Paper Abstract and Keywords |
Presentation |
2008-03-27 17:15
An Efficient Algorithm for Finding All DC Solutions of Piecewise-Linear Circuits Kiyotaka Yamamura, Mitsuru Tonokura, Wataru Takahashi (Chuo Univ.) NLP2007-166 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
An efficient algorithm is proposed for finding all DC solutions of transistor circuits where characteristics of transistors are represented by piecewise-linear (PWL) convex monotone functions. This algorithm is based on a simple test (termed the LP test) for non-existence of a solution to a system of PWL equations in a given region. In the conventional LP test, the system of PWL equations is transformed into a linear programming problem by surrounding component PWL functions by rectangles. Then the dual simplex method is applied, by which the number of pivotings per region becomes very small. In this letter, we propose a new LP test using the dual simplex method and triangles. The proposed test is not only efficient but also more
powerful than the conventional test using the simplex method or rectangles. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
nonlinear circuit / DC analysis / finding all solutions / circuit simulation / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 107, no. 560, NLP2007-166, pp. 71-76, March 2008. |
Paper # |
NLP2007-166 |
Date of Issue |
2008-03-20 (NLP) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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NLP2007-166 |
Conference Information |
Committee |
NLP |
Conference Date |
2008-03-27 - 2008-03-28 |
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(See Japanese page) |
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(See Japanese page) |
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Paper Information |
Registration To |
NLP |
Conference Code |
2008-03-NLP |
Language |
English |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
An Efficient Algorithm for Finding All DC Solutions of Piecewise-Linear Circuits |
Sub Title (in English) |
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Keyword(1) |
nonlinear circuit |
Keyword(2) |
DC analysis |
Keyword(3) |
finding all solutions |
Keyword(4) |
circuit simulation |
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1st Author's Name |
Kiyotaka Yamamura |
1st Author's Affiliation |
Chuo University (Chuo Univ.) |
2nd Author's Name |
Mitsuru Tonokura |
2nd Author's Affiliation |
Chuo University (Chuo Univ.) |
3rd Author's Name |
Wataru Takahashi |
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Chuo University (Chuo Univ.) |
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Speaker |
Author-1 |
Date Time |
2008-03-27 17:15:00 |
Presentation Time |
25 minutes |
Registration for |
NLP |
Paper # |
NLP2007-166 |
Volume (vol) |
vol.107 |
Number (no) |
no.560 |
Page |
pp.71-76 |
#Pages |
6 |
Date of Issue |
2008-03-20 (NLP) |
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