Paper Abstract and Keywords |
Presentation |
2008-03-07 09:30
The voice recognition circuit by using hardware and software complex Yuya Usami, Hiroshi Kotaki, Kazushi Takahashi, Masatoshi Sekine (TUAT) EA2007-112 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
We make the function of a cochlea that is one of auditory organs by a logical circuit,
and implement the digital circuit by using FPGA.
We use Mr Irino's Auditory Model to make the circuit of a cochlea,
and this circuit is implemented by our hwModuleV2.
In this paper,the feature quantity that obtains by our circuit will be referred to as "Sound Image",
and the template macthing of the vowel is executed by using "Sound Image".
We verify whether the vowel recognition is possible by matching results.
The coarse to fine algorithm is used by the template matching.
The coarse to fine matching is the algorithm that uses the coarse "Sound Image" for global matching in the first time,
and uses the fine "Sound Image" for local matching decided from coarse matching results in the second time.
As a result,the vowel recognition is possible by "Sound Image",we can make the high speed processing of the vowel recognition. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Auditory Model / Coarse to Fine Template Macthing / Vowel Recognition / FPGA / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 107, no. 532, EA2007-112, pp. 1-6, March 2008. |
Paper # |
EA2007-112 |
Date of Issue |
2008-02-29 (EA) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Download PDF |
EA2007-112 |
Conference Information |
Committee |
EA |
Conference Date |
2008-03-07 - 2008-03-07 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
NTT Musashino R&D Center |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Audio signal and speech processing, enhancement/General |
Paper Information |
Registration To |
EA |
Conference Code |
2008-03-EA |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
The voice recognition circuit by using hardware and software complex |
Sub Title (in English) |
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Keyword(1) |
Auditory Model |
Keyword(2) |
Coarse to Fine Template Macthing |
Keyword(3) |
Vowel Recognition |
Keyword(4) |
FPGA |
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1st Author's Name |
Yuya Usami |
1st Author's Affiliation |
Tokyo University of Agriculture And Technology (TUAT) |
2nd Author's Name |
Hiroshi Kotaki |
2nd Author's Affiliation |
Tokyo University of Agriculture And Technology (TUAT) |
3rd Author's Name |
Kazushi Takahashi |
3rd Author's Affiliation |
Tokyo University of Agriculture And Technology (TUAT) |
4th Author's Name |
Masatoshi Sekine |
4th Author's Affiliation |
Tokyo University of Agriculture And Technology (TUAT) |
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Speaker |
Author-1 |
Date Time |
2008-03-07 09:30:00 |
Presentation Time |
25 minutes |
Registration for |
EA |
Paper # |
EA2007-112 |
Volume (vol) |
vol.107 |
Number (no) |
no.532 |
Page |
pp.1-6 |
#Pages |
6 |
Date of Issue |
2008-02-29 (EA) |