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| Presentation | 2008-01-25 13:00 [Invited Talk] Development of HTS Josephson Junctions for SFQ Circuits Hironori Wakana, Seiji Adachi, Tsunehiro Hato, Michitaka Maruyama, Yoshinobu Tarutani, Keiichi Tanabe (SRL) Link to ES Tech. Rep. Archives:  SCE2007-25 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | We have developed the fabrication process of a multilayer structure and a ramp-edge Josephson junction for single flux quantum (SFQ) circuit application using a high-temperature superconductor (HTS). For operation of SFQ circuits and a sampler with a bandwidth more than 100 GHz, establishment of the fabrication process for junctions with high IcRn products is indispensable by developing the Cu-poor precursor process. We obtained IcRn products up to 1.3 mV at 40 K. We found that Ic level of the junction at 40 K well correlated with the junction resistance at room temperature. We also developed a JJ-TEG for evaluation of junction resistance at room temperature. This JJ-TEG was used to judge whether it could be operated at 40 K. Operations of several types of SFQ circuit elements for an A/D converter and a sampler circuit with bandwidth well over 50 GHz have been successfully demonstrated by using this fabrication process and evaluation method. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | SFQ circuit / ramp-edge Josephson junction / high-temperature superconductor / / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 107, no. 458, SCE2007-25, pp. 1-6, Jan. 2008. | |
| Paper # | SCE2007-25 | |
| Date of Issue | 2008-01-18 (SCE) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | Link to ES Tech. Rep. Archives: SCE2007-25 |
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| Conference Information | |
| Committee | SCE |
| Conference Date | 2008-01-25 - 2008-01-25 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kikai-Shinko-Kaikan Bldg. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Digital applications |
| Paper Information | |
| Registration To | SCE |
| Conference Code | 2008-01-SCE |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Development of HTS Josephson Junctions for SFQ Circuits |
| Sub Title (in English) | |
| Keyword(1) | SFQ circuit |
| Keyword(2) | ramp-edge Josephson junction |
| Keyword(3) | high-temperature superconductor |
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| 1st Author's Name | Hironori Wakana |
| 1st Author's Affiliation | Superconductivity Research Laboratory (SRL) |
| 2nd Author's Name | Seiji Adachi |
| 2nd Author's Affiliation | Superconductivity Research Laboratory (SRL) |
| 3rd Author's Name | Tsunehiro Hato |
| 3rd Author's Affiliation | Superconductivity Research Laboratory (SRL) |
| 4th Author's Name | Michitaka Maruyama |
| 4th Author's Affiliation | Superconductivity Research Laboratory (SRL) |
| 5th Author's Name | Yoshinobu Tarutani |
| 5th Author's Affiliation | Superconductivity Research Laboratory (SRL) |
| 6th Author's Name | Keiichi Tanabe |
| 6th Author's Affiliation | Superconductivity Research Laboratory (SRL) |
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| Speaker | Author-1 |
| Date Time | 2008-01-25 13:00:00 |
| Presentation Time | 25 minutes |
| Registration for | SCE |
| Paper # | SCE2007-25 |
| Volume (vol) | vol.107 |
| Number (no) | no.458 |
| Page | pp.1-6 |
| #Pages | 6 |
| Date of Issue | 2008-01-18 (SCE) |
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