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| Presentation | 2008-01-17 11:05 Implementation of 3-D Dynamically Reconfiguarable Device using Inter-Chip Wireless Communication Shotaro Saito, Yasufumi Sugimori, Yoshinori Kohama, Tadahiro Kuroda, Yohei Hasegawa, Hideharu Amano (Keio Univ.)  VLD2007-123 CPSY2007-66 RECONF2007-69 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | This paper describes the physical design and evaluation of 3-D dynamically reconfigurable processor MuCCRA-Cube which consists of stacked MuCCRA chips. Each MuCCRA chip (plane) is architecturally identical, and it has a single array of reconfigurable Processing Elements (PEs) and data memory elements. Each plane can switch the PE-array structure based on the multicontext-style dynamic reconfiguration. For an inter-chip connection, a wireless communication technique based on the inductive coupling communication is provided. This is the profitable technique for developing cost-efficientand scalable multi-core architectures because several chips can bestacked after the chip fabrication with relatively low costs. We have developed a prototype chip of MuCCRA-Cube with ASPLA/STARC 90nm CMOS technology. Evaluation result shows that the feasibility of the 3-D stacked MuCCRA-Cube and the potential of the performance improvement. |
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| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Dynamically Reconfigurable Processor / 3D-IC / Inductive Coupling Communication / / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 107, no. 419, RECONF2007-69, pp. 31-36, Jan. 2008. | |
| Paper # | RECONF2007-69 | |
| Date of Issue | 2008-01-10 (VLD, CPSY, RECONF) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | VLD2007-123 CPSY2007-66 RECONF2007-69 |
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| Conference Information | |
| Committee | RECONF CPSY VLD IPSJ-SLDM |
| Conference Date | 2008-01-16 - 2008-01-17 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Hiyoshi Campus, Keio University |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | FPGA Applications, etc |
| Paper Information | |
| Registration To | RECONF |
| Conference Code | 2008-01-RECONF-CPSY-VLD-IPSJ-SLDM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Implementation of 3-D Dynamically Reconfiguarable Device using Inter-Chip Wireless Communication |
| Sub Title (in English) | |
| Keyword(1) | Dynamically Reconfigurable Processor |
| Keyword(2) | 3D-IC |
| Keyword(3) | Inductive Coupling Communication |
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| 1st Author's Name | Shotaro Saito |
| 1st Author's Affiliation | Keio University (Keio Univ.) |
| 2nd Author's Name | Yasufumi Sugimori |
| 2nd Author's Affiliation | Keio University (Keio Univ.) |
| 3rd Author's Name | Yoshinori Kohama |
| 3rd Author's Affiliation | Keio University (Keio Univ.) |
| 4th Author's Name | Tadahiro Kuroda |
| 4th Author's Affiliation | Keio University (Keio Univ.) |
| 5th Author's Name | Yohei Hasegawa |
| 5th Author's Affiliation | Keio University (Keio Univ.) |
| 6th Author's Name | Hideharu Amano |
| 6th Author's Affiliation | Keio University (Keio Univ.) |
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| Speaker | Author-1 |
| Date Time | 2008-01-17 11:05:00 |
| Presentation Time | 25 minutes |
| Registration for | RECONF |
| Paper # | VLD2007-123, CPSY2007-66, RECONF2007-69 |
| Volume (vol) | vol.107 |
| Number (no) | no.415(VLD), no.417(CPSY), no.419(RECONF) |
| Page | pp.31-36 |
| #Pages | 6 |
| Date of Issue | 2008-01-10 (VLD, CPSY, RECONF) |
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