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Paper Abstract and Keywords
Presentation 2007-11-22 10:30
Highly Extensible Base Processors for Short-term ASIP Design
Hirofumi Iwato, Takuji Hieda, Hiroaki Tanaka (Osaka Univ.), Jun Sato (Tsuruoka NCT), Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai (Osaka Univ.) VLD2007-92 DC2007-47
Abstract (in Japanese) (See Japanese page) 
(in English) ASIPs (Application Specific Instruction-set Processors) are embbeded processors
whose architectures are customized for specific applications.
A problem of employing ASIPs is a long period of development due to the need of
designing a processor for each application respectively.
ASIP Meister is a tool that is able to automatically generate HDL descriptions of ASIPs
from their specifications.
However, although designers use ASIP Meister, it is hard to develop ASIPs in a required period
because the demand of shorter TAT has been increasing today.
Therefore, base processors for ASIP Meister are required to accelerate developing speed of ASIPs.
In this paper, we propose a base processor called Brownie, which is suitable for ASIP Meister,
and show the effectiveness of using Brownie through designing several samples.
Keyword (in Japanese) (See Japanese page) 
(in English) ASIP / Base Processor / Brownie / ASIP Meister / / / /  
Reference Info. IEICE Tech. Rep., vol. 107, no. 336, VLD2007-92, pp. 19-24, Nov. 2007.
Paper # VLD2007-92 
Date of Issue 2007-11-15 (VLD, DC) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (No. 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2007-92 DC2007-47

Conference Information
Committee VLD CPSY RECONF DC IPSJ-SLDM IPSJ-ARC  
Conference Date 2007-11-20 - 2007-11-22 
Place (in Japanese) (See Japanese page) 
Place (in English) Kitakyushu International Conference Center 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Gaia 2007 ---A New Frontier in VLSI Design--- 
Paper Information
Registration To VLD 
Conference Code 2007-11-VLD-CPSY-RECONF-DC-IPSJ-SLDM-IPSJ-ARC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Highly Extensible Base Processors for Short-term ASIP Design 
Sub Title (in English)  
Keyword(1) ASIP  
Keyword(2) Base Processor  
Keyword(3) Brownie  
Keyword(4) ASIP Meister  
Keyword(5)  
Keyword(6)  
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1st Author's Name Hirofumi Iwato  
1st Author's Affiliation Osaka University (Osaka Univ.)
2nd Author's Name Takuji Hieda  
2nd Author's Affiliation Osaka University (Osaka Univ.)
3rd Author's Name Hiroaki Tanaka  
3rd Author's Affiliation Osaka University (Osaka Univ.)
4th Author's Name Jun Sato  
4th Author's Affiliation Tsuruoka National College of Technology (Tsuruoka NCT)
5th Author's Name Keishi Sakanushi  
5th Author's Affiliation Osaka University (Osaka Univ.)
6th Author's Name Yoshinori Takeuchi  
6th Author's Affiliation Osaka University (Osaka Univ.)
7th Author's Name Masaharu Imai  
7th Author's Affiliation Osaka University (Osaka Univ.)
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Speaker
Date Time 2007-11-22 10:30:00 
Presentation Time 25 
Registration for VLD 
Paper # IEICE-VLD2007-92,IEICE-DC2007-47 
Volume (vol) IEICE-107 
Number (no) no.336(VLD), no.339(DC) 
Page pp.19-24 
#Pages IEICE-6 
Date of Issue IEICE-VLD-2007-11-15,IEICE-DC-2007-11-15 


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