Paper Abstract and Keywords |
Presentation |
2007-11-21 15:45
A Resource Binding Method for Reducing Power Consumption of LSI Data Communications Hidekazu Seto, Kazuhito Ito (Saitama Univ.) VLD2007-86 DC2007-41 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
The power consumption by data communications on a LSI chip depends on the layout of modules as well as how data are communicated among modules. The data communications are determined by the resource binding of operations to functional units and data to registers. The binding in turn depends on the operation schedule. To separate the binding optimization and floorplan optimization to minimize the power consumption by data communications, it is important to derive a binding which introduces the floorplan with minimized power consumption. In this paper, several evaluation functions of the resource binding are proposed and the effectiveness of each evaluation function is compared. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Low Power / Scheduling / Binding / Floorplan / Data Communication / / / |
Reference Info. |
IEICE Tech. Rep., vol. 107, no. 335, VLD2007-86, pp. 25-30, Nov. 2007. |
Paper # |
VLD2007-86 |
Date of Issue |
2007-11-14 (VLD, DC) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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VLD2007-86 DC2007-41 |
Conference Information |
Committee |
VLD CPSY RECONF DC IPSJ-SLDM IPSJ-ARC |
Conference Date |
2007-11-20 - 2007-11-22 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Kitakyushu International Conference Center |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Design Gaia 2007 ---A New Frontier in VLSI Design--- |
Paper Information |
Registration To |
VLD |
Conference Code |
2007-11-VLD-CPSY-RECONF-DC-IPSJ-SLDM-IPSJ-ARC |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
A Resource Binding Method for Reducing Power Consumption of LSI Data Communications |
Sub Title (in English) |
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Keyword(1) |
Low Power |
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Scheduling |
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Binding |
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Floorplan |
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Data Communication |
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1st Author's Name |
Hidekazu Seto |
1st Author's Affiliation |
Saitama University (Saitama Univ.) |
2nd Author's Name |
Kazuhito Ito |
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Saitama University (Saitama Univ.) |
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Speaker |
Author-1 |
Date Time |
2007-11-21 15:45:00 |
Presentation Time |
25 minutes |
Registration for |
VLD |
Paper # |
VLD2007-86, DC2007-41 |
Volume (vol) |
vol.107 |
Number (no) |
no.335(VLD), no.338(DC) |
Page |
pp.25-30 |
#Pages |
6 |
Date of Issue |
2007-11-14 (VLD, DC) |
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