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| Presentation | 2007-11-20 16:25 FTN Simulation Technology Based on Analysis of Frequency, Time and Noise for High-speed Serial Communication System Goichi Ono, Takashi Takemoto, Koji Fukuda, Fumio Yuki, Ryo Nemoto, Eiichi Suzuki, Masayoshi Yagyu, Hiroki Yamashita, Tatsuya Saito (Hitachi)  CPSY2007-38 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | We introduce a FTN simulation technology and its circuit behavior models for a high-speed serial communication system between chips and between boards in information equipments such as servers and routers. The FTN simulation is based on analysis of frequency, time and noise, and is constructed by using a numerical computation tool MATLAB / Simulink. In this paper, we describe the behavior models based on the three elements for a transmitter, a receiver and a transmission system. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Behavior model / High-speed serial communication / System simulation / / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 107, no. 333, CPSY2007-38, pp. 19-24, Nov. 2007. | |
| Paper # | CPSY2007-38 | |
| Date of Issue | 2007-11-13 (CPSY) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | CPSY2007-38 |
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| Conference Information | |
| Committee | VLD CPSY RECONF DC IPSJ-SLDM IPSJ-ARC |
| Conference Date | 2007-11-20 - 2007-11-22 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kitakyushu International Conference Center |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Gaia 2007 ---A New Frontier in VLSI Design--- |
| Paper Information | |
| Registration To | CPSY |
| Conference Code | 2007-11-VLD-CPSY-RECONF-DC-IPSJ-SLDM-IPSJ-ARC |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | FTN Simulation Technology Based on Analysis of Frequency, Time and Noise for High-speed Serial Communication System |
| Sub Title (in English) | |
| Keyword(1) | Behavior model |
| Keyword(2) | High-speed serial communication |
| Keyword(3) | System simulation |
| Keyword(4) | |
| Keyword(5) | |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Goichi Ono |
| 1st Author's Affiliation | Hitachi, Ltd. (Hitachi) |
| 2nd Author's Name | Takashi Takemoto |
| 2nd Author's Affiliation | Hitachi, Ltd. (Hitachi) |
| 3rd Author's Name | Koji Fukuda |
| 3rd Author's Affiliation | Hitachi, Ltd. (Hitachi) |
| 4th Author's Name | Fumio Yuki |
| 4th Author's Affiliation | Hitachi, Ltd. (Hitachi) |
| 5th Author's Name | Ryo Nemoto |
| 5th Author's Affiliation | Hitachi, Ltd. (Hitachi) |
| 6th Author's Name | Eiichi Suzuki |
| 6th Author's Affiliation | Hitachi, Ltd. (Hitachi) |
| 7th Author's Name | Masayoshi Yagyu |
| 7th Author's Affiliation | Hitachi, Ltd. (Hitachi) |
| 8th Author's Name | Hiroki Yamashita |
| 8th Author's Affiliation | Hitachi, Ltd. (Hitachi) |
| 9th Author's Name | Tatsuya Saito |
| 9th Author's Affiliation | Hitachi, Ltd. (Hitachi) |
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| Speaker | Author-1 |
| Date Time | 2007-11-20 16:25:00 |
| Presentation Time | 25 minutes |
| Registration for | CPSY |
| Paper # | CPSY2007-38 |
| Volume (vol) | vol.107 |
| Number (no) | no.333 |
| Page | pp.19-24 |
| #Pages | 6 |
| Date of Issue | 2007-11-13 (CPSY) |
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