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Paper Abstract and Keywords
Presentation 2007-10-25 14:20
New Compact and Power-Efficient Implementations of Rank-Order-Filters and Sorting Engines Using Time-Domain Technique
Liem T. Nguyen, Kiyoto Ito, Tadashi Shibata (Univ. of Tokyo) SIP2007-117 ICD2007-106 IE2007-76 Link to ES Tech. Rep. Archives: ICD2007-106
Abstract (in Japanese) (See Japanese page) 
(in English) A compact and power-efficient digital implementation of rank order filters compatible with focal-plane image processing has been developed based on a time-domain computation technique. The magnitude of an analog pixel intensity is represented as a pulse width in the pulse width modulation scheme and the rank order filtering is accomplished using simple digital adders and a binary counter. As a result, a very compact implementation comparable to analog counterparts has been achieved, while preserving the accuracy and programmability of digital implementation, this enable us to use the rank order filter as a building block in a parallel processing array. A test chip capable of performing multiple rank order filtering for up to 16 inputs was designed and fabricated in a 0.35-m standard CMOS technology. Experimental results have demonstrated the correct operation of the circuit in a low power dissipation (0.44mW at 3.3V) with a very compact core size (0.014mm2). The circuit has shown the speed performance of over 260K ranks/s at 8-bit resolution, which is more than sufficient for use at typical video frame rates. In addition, a new architecture for compact implementation of sorting engines with some modification in peripheral circuitries of the proposed rank order filtering architecture is also presented.
Keyword (in Japanese) (See Japanese page) 
(in English) rank order filter / ROF / median filter / winner-take-all / WTA / sorting / hardware implementation / parallel processing  
Reference Info. IEICE Tech. Rep., vol. 107, no. 287, ICD2007-106, pp. 41-46, Oct. 2007.
Paper # ICD2007-106 
Date of Issue 2007-10-18 (SIP, ICD, IE) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
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Download PDF SIP2007-117 ICD2007-106 IE2007-76 Link to ES Tech. Rep. Archives: ICD2007-106

Conference Information
Committee SIP ICD IE IPSJ-SLDM  
Conference Date 2007-10-25 - 2007-10-26 
Place (in Japanese) (See Japanese page) 
Place (in English) Aidu-Higasiyama-Onsen Kuturogijuku 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To ICD 
Conference Code 2007-10-SIP-ICD-IE-IPSJ-SLDM 
Language English (Japanese title is available) 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) New Compact and Power-Efficient Implementations of Rank-Order-Filters and Sorting Engines Using Time-Domain Technique 
Sub Title (in English)  
Keyword(1) rank order filter  
Keyword(2) ROF  
Keyword(3) median filter  
Keyword(4) winner-take-all  
Keyword(5) WTA  
Keyword(6) sorting  
Keyword(7) hardware implementation  
Keyword(8) parallel processing  
1st Author's Name Liem T. Nguyen  
1st Author's Affiliation University of Tokyo (Univ. of Tokyo)
2nd Author's Name Kiyoto Ito  
2nd Author's Affiliation University of Tokyo (Univ. of Tokyo)
3rd Author's Name Tadashi Shibata  
3rd Author's Affiliation University of Tokyo (Univ. of Tokyo)
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Date Time 2007-10-25 14:20:00 
Presentation Time 20 minutes 
Registration for ICD 
Paper # SIP2007-117, ICD2007-106, IE2007-76 
Volume (vol) vol.107 
Number (no) no.285(SIP), no.287(ICD), no.289(IE) 
Page pp.41-46 
#Pages
Date of Issue 2007-10-18 (SIP, ICD, IE) 


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