Paper Abstract and Keywords |
Presentation |
2007-09-21 10:00
Dynamically Reconfigurable Protocol Transducer Synthesis for utilizing IPs Yuji Ishikawa, Satoshi Komatsu, Masahiro Fujita (Tokyo Univ.) RECONF2007-24 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
Protocol transducer synthesis is one of the most important issues for efficient IP core reuse in SoC designs.
We proposed an automatic protocol transducer synthesis method for conventional LSI design processes in our exsiting works. In this paper, we propose an application of our protocol synthesis method to reconfigurable architecture on FPGA that enables to utilize various
IPs dynamically. In coarsegrained reconfigurable architectures such as hardware OS, protocol transducers should also be dynamically reconfigured to make the dynamically loaded IPs able to communicate with one another. In our proposed method, a protocol transducers is synthesized as set of partial-transducers at design time. A whole
transducer is also constructed at runtime, by selecting and placing partial transducers dynamically. The proposed method contributes to the improvement of area efficiency by constructing minimum transducers. Each partial transducer can be given in either layouted design hard macros or in netlists. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
protocol transducer / dynamic reconfiguration / design reuse / / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 107, no. 225, RECONF2007-24, pp. 53-58, Sept. 2007. |
Paper # |
RECONF2007-24 |
Date of Issue |
2007-09-13 (RECONF) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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RECONF2007-24 |
Conference Information |
Committee |
RECONF |
Conference Date |
2007-09-20 - 2007-09-21 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Ritsumeikan Univ. Biwako Kusatsu Campus (Shiga) |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Reconfigurable Systems, etc |
Paper Information |
Registration To |
RECONF |
Conference Code |
2007-09-RECONF |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Dynamically Reconfigurable Protocol Transducer Synthesis for utilizing IPs |
Sub Title (in English) |
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Keyword(1) |
protocol transducer |
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dynamic reconfiguration |
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design reuse |
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1st Author's Name |
Yuji Ishikawa |
1st Author's Affiliation |
Tokyo University (Tokyo Univ.) |
2nd Author's Name |
Satoshi Komatsu |
2nd Author's Affiliation |
Tokyo University (Tokyo Univ.) |
3rd Author's Name |
Masahiro Fujita |
3rd Author's Affiliation |
Tokyo University (Tokyo Univ.) |
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Speaker |
Author-1 |
Date Time |
2007-09-21 10:00:00 |
Presentation Time |
30 minutes |
Registration for |
RECONF |
Paper # |
RECONF2007-24 |
Volume (vol) |
vol.107 |
Number (no) |
no.225 |
Page |
pp.53-58 |
#Pages |
6 |
Date of Issue |
2007-09-13 (RECONF) |
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