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Paper Abstract and Keywords
Presentation 2007-07-20 09:55
On Error Probability of NAND circuits consisted of two FTM gates
Takahiro Hayashida, Noboru Watanabe (TUS) IT2007-16
Abstract (in Japanese) (See Japanese page) 
(in English) The usual computer based on the logical gate with irreversible processes has a demerit concerning a loss of information. In order to avoid this demerit, Fredkin and Toffoli proposed a reversible logical gate with three input - three output. Based on the Fredkin-Foffoli gate, Milburn introduced an optical model of FT gate which is called a FTM (Fredkin-Toffli-Milburn) gate. It is reformulated by Ohya and Watanabe using quantum communication channel.
In this paper, we study the efficiency of NAND circuit consisted of two FTM gates by calculating the error probability of NAND circuits.
Keyword (in Japanese) (See Japanese page) 
(in English) quantum computer / FTM gate / NAND gate / error probability / / / /  
Reference Info. IEICE Tech. Rep., vol. 107, no. 143, IT2007-16, pp. 7-12, July 2007.
Paper # IT2007-16 
Date of Issue 2007-07-13 (IT) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee IT  
Conference Date 2007-07-19 - 2007-07-20 
Place (in Japanese) (See Japanese page) 
Place (in English) Kobe Univ. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Freshman ssesion, general 
Paper Information
Registration To IT 
Conference Code 2007-07-IT 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) On Error Probability of NAND circuits consisted of two FTM gates 
Sub Title (in English)  
Keyword(1) quantum computer  
Keyword(2) FTM gate  
Keyword(3) NAND gate  
Keyword(4) error probability  
1st Author's Name Takahiro Hayashida  
1st Author's Affiliation Tokyo University of Science (TUS)
2nd Author's Name Noboru Watanabe  
2nd Author's Affiliation Tokyo University of Science (TUS)
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Date Time 2007-07-20 09:55:00 
Presentation Time 25 
Registration for IT 
Paper # IEICE-IT2007-16 
Volume (vol) IEICE-107 
Number (no) no.143 
Page pp.7-12 
#Pages IEICE-6 
Date of Issue IEICE-IT-2007-07-13 

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