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Paper Abstract and Keywords
Presentation 2007-06-25 14:40
Design of HEMT Comparators for Ultrahigh-Speed A/D Conversion
Hiroshi Watanabe,, Shunsuke Nakamura,, Takao Waho (Sophia Univ.)
Abstract (in Japanese) (See Japanese page) 
(in English) HEMT comparators for ultrahigh-speed A/D converters have been investigated. In particular, the transition times of the D-latch used in the comparator have been analyzed by assuming a 0.1-mm HEMT technology. It is found that for small input signals (< 0.1 V), the transition time from the track to latch phase dominates the comparator operation speed. As the input signal increases, this time decreases due to the positive feedback in the latch, and the comparator speed is limited by the transition time from the latch to track phase.
Keyword (in Japanese) (See Japanese page) 
(in English) comparator / D-latch / HEMT / analog-to-digital converter / / / /  
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Conference Information
Committee ED SDM  
Conference Date 2007-06-25 - 2007-06-27 
Place (in Japanese) (See Japanese page) 
Place (in English) Commodore Hotel Gyeongju Chosun, Gyeongju, Korea 
Topics (in Japanese) (See Japanese page) 
Topics (in English) 2007 Asia-Pacific Workshopn on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD2007) 
Paper Information
Registration To ED 
Conference Code 2007-06-ED-SDM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Design of HEMT Comparators for Ultrahigh-Speed A/D Conversion 
Sub Title (in English)  
Keyword(1) comparator  
Keyword(2) D-latch  
Keyword(3) HEMT  
Keyword(4) analog-to-digital converter  
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1st Author's Name Hiroshi Watanabe,  
1st Author's Affiliation Sophia University (Sophia Univ.)
2nd Author's Name Shunsuke Nakamura,  
2nd Author's Affiliation Sophia University (Sophia Univ.)
3rd Author's Name Takao Waho  
3rd Author's Affiliation Sophia University (Sophia Univ.)
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Speaker Author-1 
Date Time 2007-06-25 14:40:00 
Presentation Time 25 minutes 
Registration for ED 
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