Paper Abstract and Keywords |
Presentation |
2007-04-12 13:00
[Invited Talk]
2-Mb SPRAM (SPin-transfer torque RAM) with Bit-by-bit Bi-Directional Current Write and Parallelizing-Direction Current Read Riichiro Takemura, Takayuki Kawahara, Katsuya Miura (Hitachi), Jun Hayakawa (Hitachi/Tohoku Univ.), Shoji Ikeda, Young Min LEE, Ryutaro Sasaki (Tohoku Univ.), Yasushi Goto, Kenchi Ito (Hitachi), Toshiyasu Meguro, Fumihiro Matsukura (Tohoku Univ.), Hiromasa Takahashi (Hitachi/Tohoku Univ.), Hideyuki Matsuoka (Hitachi), Hideo Ohno (Tohoku Univ.) ICD2007-6 Link to ES Tech. Rep. Archives: ICD2007-6 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
A 1.8-V 2-Mb SPRAM (SPin-transfer torque RAM) chip using 0.2 µm logic process with MgO tunneling barrier cell demonstrates the circuit technologies for potential low power non-volatile RAM, or universal memory. This chip features: an array scheme with bit-by-bit bi-directional current write to achieve proper spin-transfer torque writing of 100 ns, and parallelizing-direction current reading with low voltage bit-line that leads to 40-ns access time. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
universal memory / nonvolatile RAM / low-power RAM / spin-transfer torque / TMR / Bi-directional current write / Parallelizing direction current read / |
Reference Info. |
IEICE Tech. Rep., vol. 107, no. 1, ICD2007-6, pp. 29-34, April 2007. |
Paper # |
ICD2007-6 |
Date of Issue |
2007-04-05 (ICD) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
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ICD2007-6 Link to ES Tech. Rep. Archives: ICD2007-6 |
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