Paper Abstract and Keywords |
Presentation |
2007-03-05 14:30
Design of 10-bit, 40MSample/s Current-Steering D/A Converter for WLAN Shinji Otaki, Takeshi Ueno, Tetsuro Itakura (Toshiba) CAS2006-87 SIP2006-188 CS2006-104 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
In an advanced CMOS technology, the supply voltage has been decreased and digital circuits should operate at 1.2V supply voltage in 90nm CMOS process. In wireless communication, since D/A converter is often integrated with digital baseband circuits, it is desirable to operate at the same voltage as digital circuits. In this article, we propose a current-steering D/A converter using folded cascode architecture, which operates at 1.2V supply voltage and achieves 1.0Vpp output swing. For WLAN applications, sampling rate is 40MSPS and resolution is 10 bit. Simulation results show that SFDR is 67dB at 1MHz input frequency. Folded cascode architecture is effective to design D/A converters that operate at low supply voltage and achieve high output swing. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
D/A converter / low supply voltage / folded cascode / / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 106, no. 567, CAS2006-87, pp. 57-61, March 2007. |
Paper # |
CAS2006-87 |
Date of Issue |
2007-02-26 (CAS, SIP, CS) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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CAS2006-87 SIP2006-188 CS2006-104 |
Conference Information |
Committee |
SIP CAS CS |
Conference Date |
2007-03-05 - 2007-03-06 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Blancart Misasa (Tottori) |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Signal Processing for Communications, Code Theory, etc. |
Paper Information |
Registration To |
CAS |
Conference Code |
2007-03-SIP-CAS-CS |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Design of 10-bit, 40MSample/s Current-Steering D/A Converter for WLAN |
Sub Title (in English) |
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Keyword(1) |
D/A converter |
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low supply voltage |
Keyword(3) |
folded cascode |
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1st Author's Name |
Shinji Otaki |
1st Author's Affiliation |
Toshiba Corporation (Toshiba) |
2nd Author's Name |
Takeshi Ueno |
2nd Author's Affiliation |
Toshiba Corporation (Toshiba) |
3rd Author's Name |
Tetsuro Itakura |
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Toshiba Corporation (Toshiba) |
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Speaker |
Author-1 |
Date Time |
2007-03-05 14:30:00 |
Presentation Time |
25 minutes |
Registration for |
CAS |
Paper # |
CAS2006-87, SIP2006-188, CS2006-104 |
Volume (vol) |
vol.106 |
Number (no) |
no.567(CAS), no.569(SIP), no.571(CS) |
Page |
pp.57-61 |
#Pages |
5 |
Date of Issue |
2007-02-26 (CAS, SIP, CS) |
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