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| Presentation | 2007-01-18 10:55 Delay Variation Analysis in Consideration of Dynamic Power Supply Noise Waveform Mitsuya Fukazawa, Makoto Nagata (Kobe Univ.) Link to ES Tech. Rep. Archives:  CPM2006-133 ICD2006-175 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | Delay variability due to dynamic power supply noise is elucidated by on-chip signal waveform measurements at 100-ps/100-$\mu$V resolutions applied to a 180-nm CMOS digital circuit. A single-tone noise model represents a dynamic power supply noise waveform with the most significant frequency component and leads to circuit-level simulation that can efficiently capture the effects of switching signal waveform modulation on delay in a logic gate. Simulation and measurements show excellent agreement in delay variation, even with relative differences among clock domains in timing as well as in noise strength. The proposed delay simulation technique actualizes the delay analysis in consideration of dynamic power supply noise and thus consolidates the timing closure especially in a high speed digital design. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Delay variation analysis / Dynamic Power supply noise / Signal integrity / On-chip waveform measurement / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 106, no. 468, ICD2006-175, pp. 25-29, Jan. 2007. | |
| Paper # | ICD2006-175 | |
| Date of Issue | 2007-01-11 (CPM, ICD) | |
| ISSN | Print edition: ISSN 0913-5685 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | Link to ES Tech. Rep. Archives: CPM2006-133 ICD2006-175 |
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| Conference Information | |
| Committee | ICD CPM |
| Conference Date | 2007-01-18 - 2007-01-19 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kika-Shinko-Kaikan Bldg. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | LSI system assembly and module/inteface technology, test, general |
| Paper Information | |
| Registration To | ICD |
| Conference Code | 2007-01-ICD-CPM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Delay Variation Analysis in Consideration of Dynamic Power Supply Noise Waveform |
| Sub Title (in English) | |
| Keyword(1) | Delay variation analysis |
| Keyword(2) | Dynamic Power supply noise |
| Keyword(3) | Signal integrity |
| Keyword(4) | On-chip waveform measurement |
| Keyword(5) | |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Mitsuya Fukazawa |
| 1st Author's Affiliation | Kobe University (Kobe Univ.) |
| 2nd Author's Name | Makoto Nagata |
| 2nd Author's Affiliation | Kobe University (Kobe Univ.) |
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| Speaker | Author-1 |
| Date Time | 2007-01-18 10:55:00 |
| Presentation Time | 25 minutes |
| Registration for | ICD |
| Paper # | CPM2006-133, ICD2006-175 |
| Volume (vol) | vol.106 |
| Number (no) | no.467(CPM), no.468(ICD) |
| Page | pp.25-29 |
| #Pages | 5 |
| Date of Issue | 2007-01-11 (CPM, ICD) |
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