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| Presentation | 2006-10-26 16:35 A self-support oriented IP core design method Hiroyuki Hatakenaka (TDU), Tsugio Nakamura (Kokusai Junior College), Hiroshi Kasahara, Narito Fuyutsume, Teruo Tanaka (TDU) Link to ES Tech. Rep. Archives:  ICD2006-124 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | For designing an integrated circuit with the scale of System LSI or SoC, it is reasonable to reuse the circulating IP cores. But it is a quite difficult work for a single designer to get to know all the details of the specifications of dozens / hundreds of IP cores. Problems, such as interfaces between various IP cores, bus mediation mechanism, power consumption are all essential issues to be considered. To cope with these problems, the paper proposes a common IP core designing method, where 1)each core is considered to be a virtual component, not for single purpose but for general purpose uses, with the optional arithmetic accuracy 2)data transfers between IP cores are limited only by unified message-communication format. We call such a scheme of core as "self-support oriented" assimilated to object-oriented technology. |
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| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | self-supproting IP core / System LSI / reuse / ease-of-use / System on Chip / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 106, pp. 87-92, Oct. 2006. | |
| Paper # | ||
| Date of Issue | 2006-10-19 (SIP, ICD, IE) | |
| ISSN | Print edition: ISSN 0913-5685 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | Link to ES Tech. Rep. Archives: ICD2006-124 |
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| Conference Information | |
| Committee | ICD SIP IE IPSJ-SLDM |
| Conference Date | 2006-10-26 - 2006-10-27 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Paper Information | |
| Registration To | IPSJ-SLDM |
| Conference Code | 2006-10-ICD-SIP-IE-IPSJ-SLDM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A self-support oriented IP core design method |
| Sub Title (in English) | |
| Keyword(1) | self-supproting IP core |
| Keyword(2) | System LSI |
| Keyword(3) | reuse |
| Keyword(4) | ease-of-use |
| Keyword(5) | System on Chip |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Hiroyuki Hatakenaka |
| 1st Author's Affiliation | Tokyo Denki University (TDU) |
| 2nd Author's Name | Tsugio Nakamura |
| 2nd Author's Affiliation | Kokusai Junior College (Kokusai Junior College) |
| 3rd Author's Name | Hiroshi Kasahara |
| 3rd Author's Affiliation | Tokyo Denki University (TDU) |
| 4th Author's Name | Narito Fuyutsume |
| 4th Author's Affiliation | Tokyo Denki University (TDU) |
| 5th Author's Name | Teruo Tanaka |
| 5th Author's Affiliation | Tokyo Denki University (TDU) |
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| Speaker | Author-1 |
| Date Time | 2006-10-26 16:35:00 |
| Presentation Time | 20 minutes |
| Registration for | IPSJ-SLDM |
| Paper # | SIP2006-98, ICD2006-124, IE2006-76 |
| Volume (vol) | vol.106 |
| Number (no) | no.314(SIP), no.316(ICD), no.318(IE) |
| Page | pp.87-92 |
| #Pages | 6 |
| Date of Issue | 2006-10-19 (SIP, ICD, IE) |
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