Paper Abstract and Keywords |
Presentation |
2006-08-18 11:40
Embedded Bulk FinFET SRAM Cell Technology with Planar FET Peripheral Circuit for hp32 nm node and beyond Hirohisa Kawasaki (TAEC), Satoshi Inaba, Kimitoshi Okano, Akio Kaneko (Toshiba Semicon.), Atsushi Yagishita (TAEC), Takashi Izumida, Takahisa Kanemura, Takahiko Sasaki, Nobuaki Otsuka, Nobutoshi Aoki, Kyoichi Suguro, Kazuhiro Eguchi, Yoshitaka Tsunashima (Toshiba Semicon.), Kazunari Ishimaru (TAEC), Hidemi Ishiuchi (Toshiba Semicon.) Link to ES Tech. Rep. Archives: SDM2006-147 ICD2006-101 |
Abstract |
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(in English) |
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Keyword |
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(in English) |
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Reference Info. |
IEICE Tech. Rep., vol. 106, no. 206, SDM2006-147, pp. 127-132, Aug. 2006. |
Paper # |
SDM2006-147 |
Date of Issue |
2006-08-10 (SDM, ICD) |
ISSN |
Print edition: ISSN 0913-5685 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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Link to ES Tech. Rep. Archives: SDM2006-147 ICD2006-101 |
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