Paper Abstract and Keywords |
Presentation |
2006-08-18 15:25
Impact of Random Telegraph Signals on Scaling of Multilevel Flash Memories Hideaki Kurata, Kazuo Otsuga, Akira Kotabe, Shinya Kajiyama, Taro Osabe, Yoshitaka Sasago (Hitachi), Shunichi Narumi, Kenji Tokami, Shiro Kamohara, Osamu Tsuchiya (Renesas) Link to ES Tech. Rep. Archives: SDM2006-153 ICD2006-107 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
This paper describes for the first time the observation of the threshold voltage (Vth) fluctuation due to random telegraph signal (RTS) in flash memory. We acquired large amount of data of Vth fluctuation by using a 90-nm node memory array and confirmed that a few memory cells have large RTS fluctuation exceeding 0.2 V. We also found that the tail bits are generated due to RTS in multilevel flash operation by simulation and measurement results. The amount of Vth broadening due to the tail bits becomes larger as the scaling advances, and reaches to more than 0.3 V in 45-nm node. Thus the RTS becomes prominent issue for the design of multilevel flash memory in 45-nm node and beyond. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Random telegraph signal / Flash memory / Multilevel cell technology / Vth fluctuation / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 106, no. 207, ICD2006-107, pp. 161-166, Aug. 2006. |
Paper # |
ICD2006-107 |
Date of Issue |
2006-08-10 (SDM, ICD) |
ISSN |
Print edition: ISSN 0913-5685 |
Copyright and reproduction |
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Link to ES Tech. Rep. Archives: SDM2006-153 ICD2006-107 |
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