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Paper Abstract and Keywords
Presentation 2006-07-27 11:30
A study on the multi-bit-pipelined A/D converter
Hiroki Endou, Masaya Miyahara, Akira Matsuzawa (Titech) Link to ES Tech. Rep. Archives: ICD2006-63
Abstract (in Japanese) (See Japanese page) 
(in English) We have studied on the multi-bit pipeline A/D converter from the view pints of needed OP amp gain, needed capacitance, linearity, and the relation between operating current and conversion frequency. Better DNL will be expected, even if using small capacitance compared with a conventional 1.5 bit pipeline ADC. INL and needed capacitance value calculated by thermal noise analysis will be independent of the resolution for the unit conversion stage. Simulated maximum conversion frequency of the multi-bit pipelined ADC is slightly higher than that of the 1.5 bit pipelined ADC in low power region where the parasitic capacitances are sufficiently smaller than the signal capacitances.
Keyword (in Japanese) (See Japanese page) 
(in English) Analog to digital converter / pipeline operation / multi-bit conversion / low power technology / high speed technology / / /  
Reference Info. IEICE Tech. Rep., vol. 106, no. 189, ICD2006-63, pp. 17-22, July 2006.
Paper # ICD2006-63 
Date of Issue 2006-07-20 (ICD) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee ICD ITE-IST  
Conference Date 2006-07-27 - 2006-07-28 
Place (in Japanese) (See Japanese page) 
Place (in English)  
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Topics (in English)  
Paper Information
Registration To ICD 
Conference Code 2006-07-ICD-ITE-IST 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A study on the multi-bit-pipelined A/D converter 
Sub Title (in English)  
Keyword(1) Analog to digital converter  
Keyword(2) pipeline operation  
Keyword(3) multi-bit conversion  
Keyword(4) low power technology  
Keyword(5) high speed technology  
1st Author's Name Hiroki Endou  
1st Author's Affiliation Tokyo Institute of Technology (Titech)
2nd Author's Name Masaya Miyahara  
2nd Author's Affiliation Tokyo Institute of Technology (Titech)
3rd Author's Name Akira Matsuzawa  
3rd Author's Affiliation Tokyo Institute of Technology (Titech)
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Date Time 2006-07-27 11:30:00 
Presentation Time 30 
Registration for ICD 
Paper # IEICE-ICD2006-63 
Volume (vol) IEICE-106 
Number (no) no.189 
Page pp.17-22 
#Pages IEICE-6 
Date of Issue IEICE-ICD-2006-07-20 

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