Paper Abstract and Keywords |
Presentation |
2006-05-18 13:45
A study of input networks to gate in second harmonic FET oscillators Shingo Takahashi, Minoru Sanagi (Okayama Uinv.), Nobuaki Neishi (Sharp Takaya Electronics Industry), Takafumi Nakane (Fujitsu Ten Tech.), Kazuhiro Fujimori, Shigeji Nogi (Okayama Uinv.) Link to ES Tech. Rep. Archives: MW2006-12 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
In order to obtain high output power in higher frequency range such as millimeter wave, an input gate network for second harmonic FET oscillators has been investigated. In the frequency doubler, by using the input network which matches the gate terminal to signal source impedance for fundamental component and has pure reactance at both second and third harmonic frequencies, considerably high output power of second harmonic component was obtained compared with the case using a simple 50Ω line as an input network. The same input network was implemented with the second harmonic oscillator with the fundamental oscillation frequency of 4GHz, and high output power of second harmonic was obtained as 26mW. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
microwave / frequency multiplier / second harmonic oscillator / inverse class-C operation / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 106, no. 48, MW2006-12, pp. 1-5, May 2006. |
Paper # |
MW2006-12 |
Date of Issue |
2006-05-11 (MW) |
ISSN |
Print edition: ISSN 0913-5685 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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Link to ES Tech. Rep. Archives: MW2006-12 |
Conference Information |
Committee |
MW |
Conference Date |
2006-05-18 - 2006-05-19 |
Place (in Japanese) |
(See Japanese page) |
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Paper Information |
Registration To |
MW |
Conference Code |
2006-05-MW |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
A study of input networks to gate in second harmonic FET oscillators |
Sub Title (in English) |
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Keyword(1) |
microwave |
Keyword(2) |
frequency multiplier |
Keyword(3) |
second harmonic oscillator |
Keyword(4) |
inverse class-C operation |
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1st Author's Name |
Shingo Takahashi |
1st Author's Affiliation |
Okayama University (Okayama Uinv.) |
2nd Author's Name |
Minoru Sanagi |
2nd Author's Affiliation |
Okayama University (Okayama Uinv.) |
3rd Author's Name |
Nobuaki Neishi |
3rd Author's Affiliation |
Sharp Takaya Electronics Industry Co., Ltd. (Sharp Takaya Electronics Industry) |
4th Author's Name |
Takafumi Nakane |
4th Author's Affiliation |
Fujitsu Ten Technology (Fujitsu Ten Tech.) |
5th Author's Name |
Kazuhiro Fujimori |
5th Author's Affiliation |
Okayama University (Okayama Uinv.) |
6th Author's Name |
Shigeji Nogi |
6th Author's Affiliation |
Okayama University (Okayama Uinv.) |
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Speaker |
Author-1 |
Date Time |
2006-05-18 13:45:00 |
Presentation Time |
25 minutes |
Registration for |
MW |
Paper # |
MW2006-12 |
Volume (vol) |
vol.106 |
Number (no) |
no.48 |
Page |
pp.1-5 |
#Pages |
5 |
Date of Issue |
2006-05-11 (MW) |
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