| Paper Abstract and Keywords |
| Presentation |
2006-05-12 10:00
An Implementation of a Ternary-valued Logic Simulator using a Value-independent Simulator Kernel
Takatomi Wada, Yasushi Hibino (JAIST) |
| Abstract |
(in Japanese) |
(See Japanese page) |
| (in English) |
In multi-valued logic, the expression by a little number of digits can be possible. So the integration of LSI is improved by the reduction in the number of wiring etc. Moreover, efficient processing that uses ternary-valued logic in the encryption processing is possible. We implement ternary-valued logic simulator needed in designing ternary-valued logical circuit. A value-independent kernel was used to improve the extendibility in implementation. Logic that uses an arbitrary ternary-valued expression can be simulated by setting the conversion of external expression into internal expression. And a flexible extension of the simulator is possible by adding the definition of the logic function used outside of the kernel. |
| Keyword |
(in Japanese) |
(See Japanese page) |
| (in English) |
ternary-valued logic / logic simulation / / / / / / |
| Reference Info. |
IEICE Tech. Rep., vol. 106, no. 32, VLD2006-8, pp. 13-18, May 2006. |
| Paper # |
VLD2006-8 |
| Date of Issue |
2006-05-05 (VLD) |
| ISSN |
Print edition: ISSN 0913-5685 |
| Download PDF |
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| Conference Information |
| Committee |
VLD IPSJ-SLDM |
| Conference Date |
2006-05-11 - 2006-05-12 |
| Place (in Japanese) |
(See Japanese page) |
| Place (in English) |
Ehime University |
| Topics (in Japanese) |
(See Japanese page) |
| Topics (in English) |
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| Paper Information |
| Registration To |
VLD |
| Conference Code |
2006-05-VLD-IPSJ-SLDM |
| Language |
Japanese |
| Title (in Japanese) |
(See Japanese page) |
| Sub Title (in Japanese) |
(See Japanese page) |
| Title (in English) |
An Implementation of a Ternary-valued Logic Simulator using a Value-independent Simulator Kernel |
| Sub Title (in English) |
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| Keyword(1) |
ternary-valued logic |
| Keyword(2) |
logic simulation |
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| 1st Author's Name |
Takatomi Wada |
| 1st Author's Affiliation |
Japan Advanced Institute of Science and Technology (JAIST) |
| 2nd Author's Name |
Yasushi Hibino |
| 2nd Author's Affiliation |
Japan Advanced Institute of Science and Technology (JAIST) |
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| Speaker |
Author-1 |
| Date Time |
2006-05-12 10:00:00 |
| Presentation Time |
30 minutes |
| Registration for |
VLD |
| Paper # |
VLD2006-8 |
| Volume (vol) |
vol.106 |
| Number (no) |
no.32 |
| Page |
pp.13-18 |
| #Pages |
6 |
| Date of Issue |
2006-05-05 (VLD) |