Paper Abstract and Keywords |
Presentation |
2005-12-15 11:20
Scalable Bus Interface for HSDPA Co-processor Extension Toshiki Takeuchi, Hiroyuki Igura (NEC), Takeshi Hashimoto (NECEL), Soichi Tsumura, Naoki Nishi (NEC) Link to ES Tech. Rep. Archives: ICD2005-184 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
This paper presents a scalable bus developed for HSDPA co-processor extension of W-CDMA digital baseband processors. The use of two separate buses (one for control messages and one for transmission and reception data) in a multi-master bus design helps keep down bus occupancy and CPU loads. The design offers high scalability for future extension and single-chip implementation, as well as a 66% reduction in bus occupancy over that of conventional memory bus connections. Further, with the addition of a MAC accelerator, the design achieves a 45% CPU-load reduction. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
W-CDMA / HSDPA / Baseband / On chip bus / Bus architecture / / / |
Reference Info. |
IEICE Tech. Rep., vol. 105, no. 475, ICD2005-184, pp. 7-11, Dec. 2005. |
Paper # |
ICD2005-184 |
Date of Issue |
2005-12-08 (ICD) |
ISSN |
Print edition: ISSN 0913-5685 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Download PDF |
Link to ES Tech. Rep. Archives: ICD2005-184 |
Conference Information |
Committee |
ICD |
Conference Date |
2005-12-15 - 2005-12-16 |
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(See Japanese page) |
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Paper Information |
Registration To |
ICD |
Conference Code |
2005-12-ICD |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Scalable Bus Interface for HSDPA Co-processor Extension |
Sub Title (in English) |
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Keyword(1) |
W-CDMA |
Keyword(2) |
HSDPA |
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Baseband |
Keyword(4) |
On chip bus |
Keyword(5) |
Bus architecture |
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1st Author's Name |
Toshiki Takeuchi |
1st Author's Affiliation |
NEC Corporation (NEC) |
2nd Author's Name |
Hiroyuki Igura |
2nd Author's Affiliation |
NEC Corporation (NEC) |
3rd Author's Name |
Takeshi Hashimoto |
3rd Author's Affiliation |
NEC Electronics Corporation (NECEL) |
4th Author's Name |
Soichi Tsumura |
4th Author's Affiliation |
NEC Corporation (NEC) |
5th Author's Name |
Naoki Nishi |
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NEC Corporation (NEC) |
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Speaker |
Author-1 |
Date Time |
2005-12-15 11:20:00 |
Presentation Time |
25 minutes |
Registration for |
ICD |
Paper # |
ICD2005-184 |
Volume (vol) |
vol.105 |
Number (no) |
no.475 |
Page |
pp.7-11 |
#Pages |
5 |
Date of Issue |
2005-12-08 (ICD) |
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