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| Paper Abstract and Keywords | ||
| Presentation | 2005-10-21 15:00 A study for power and speed tradeoff estimation for behavior hardware model Noriyuki Inoue, Katsuhiro Oshikawa, Tomonori Izumi, Masahiro Fukui (Rits Univ.) Link to ES Tech. Rep. Archives:  ICD2005-145 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | Due to the increasing of the scale of systems, planning the design strategy based on the power estimation in early design phase becomes a very important task. Power analysis in higher abstraction level is required. Authors have developed a power estimation method that synthesize a model for tradeoff analysis of power and speed, and have studied their usefulness and problems by using a proto type system. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | high-level synthesis / high-level estimation / power estimation / tradeoff analysis / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 105, pp. 67-72, Oct. 2005. | |
| Paper # | ||
| Date of Issue | 2005-10-14 (SIP, ICD, IE) | |
| ISSN | Print edition: ISSN 0913-5685 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | Link to ES Tech. Rep. Archives: ICD2005-145 |
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| Conference Information | |
| Committee | SIP ICD IE IPSJ-SLDM |
| Conference Date | 2005-10-20 - 2005-10-21 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Ichinobo, Sakunami-Spa |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Processor, DSP, Image Engineering and etc. |
| Paper Information | |
| Registration To | IPSJ-SLDM |
| Conference Code | 2005-10-SIP-ICD-IE-IPSJ-SLDM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A study for power and speed tradeoff estimation for behavior hardware model |
| Sub Title (in English) | |
| Keyword(1) | high-level synthesis |
| Keyword(2) | high-level estimation |
| Keyword(3) | power estimation |
| Keyword(4) | tradeoff analysis |
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| 1st Author's Name | Noriyuki Inoue |
| 1st Author's Affiliation | Ritsumeikan University (Rits Univ.) |
| 2nd Author's Name | Katsuhiro Oshikawa |
| 2nd Author's Affiliation | Ritsumeikan University (Rits Univ.) |
| 3rd Author's Name | Tomonori Izumi |
| 3rd Author's Affiliation | Ritsumeikan University (Rits Univ.) |
| 4th Author's Name | Masahiro Fukui |
| 4th Author's Affiliation | Ritsumeikan University (Rits Univ.) |
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| Speaker | Author-1 |
| Date Time | 2005-10-21 15:00:00 |
| Presentation Time | 20 minutes |
| Registration for | IPSJ-SLDM |
| Paper # | SIP2005-126, ICD2005-145, IE2005-90 |
| Volume (vol) | vol.105 |
| Number (no) | no.350(SIP), no.352(ICD), no.354(IE) |
| Page | pp.67-72 |
| #Pages | 6 |
| Date of Issue | 2005-10-14 (SIP, ICD, IE) |
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