Paper Abstract and Keywords |
Presentation |
2005-10-21 15:30
A Monitor Generation Method for Formal Monitor-based Verification Considering Input Constraints Yosuke Kakiuchi (Osaka Univ.), Akira Kitajima (Osaka Electro-Communication Univ.), Kiyoharu Hamaguchi, Toshinobu Kashiwabara (Osaka Univ.) Link to ES Tech. Rep. Archives: ICD2005-146 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
In order to verify hardware module interfaces, various verification methods have been proposed. This paper focuses on formal monitor-based verification of module interfaces. In our method, first, we describe specifications of module interfaces in a language based on regular expressions, then construct behavior models from the description. Finally, we generate a monitor circuit. When we verify module interfaces formally, some input constraints are usually required. We show how to generate monitors including input constraints automatically from specifications. In verification experiments, we show that modules that comply AMBA AHB bus protocol can be verified by monitors formally. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Formal Verification / Monitor-based Verification / AMBA / Monitor Circuit Generation / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 105, pp. 73-78, Oct. 2005. |
Paper # |
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Date of Issue |
2005-10-14 (SIP, ICD, IE) |
ISSN |
Print edition: ISSN 0913-5685 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Download PDF |
Link to ES Tech. Rep. Archives: ICD2005-146 |
Conference Information |
Committee |
SIP ICD IE IPSJ-SLDM |
Conference Date |
2005-10-20 - 2005-10-21 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Ichinobo, Sakunami-Spa |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Processor, DSP, Image Engineering and etc. |
Paper Information |
Registration To |
IPSJ-SLDM |
Conference Code |
2005-10-SIP-ICD-IE-IPSJ-SLDM |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
A Monitor Generation Method for Formal Monitor-based Verification Considering Input Constraints |
Sub Title (in English) |
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Keyword(1) |
Formal Verification |
Keyword(2) |
Monitor-based Verification |
Keyword(3) |
AMBA |
Keyword(4) |
Monitor Circuit Generation |
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1st Author's Name |
Yosuke Kakiuchi |
1st Author's Affiliation |
Osaka University (Osaka Univ.) |
2nd Author's Name |
Akira Kitajima |
2nd Author's Affiliation |
Osaka Electro-Communication University (Osaka Electro-Communication Univ.) |
3rd Author's Name |
Kiyoharu Hamaguchi |
3rd Author's Affiliation |
Osaka University (Osaka Univ.) |
4th Author's Name |
Toshinobu Kashiwabara |
4th Author's Affiliation |
Osaka University (Osaka Univ.) |
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Speaker |
Author-1 |
Date Time |
2005-10-21 15:30:00 |
Presentation Time |
20 minutes |
Registration for |
IPSJ-SLDM |
Paper # |
SIP2005-127, ICD2005-146, IE2005-91 |
Volume (vol) |
vol.105 |
Number (no) |
no.350(SIP), no.352(ICD), no.354(IE) |
Page |
pp.73-78 |
#Pages |
6 |
Date of Issue |
2005-10-14 (SIP, ICD, IE) |
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