Paper Abstract and Keywords |
Presentation |
2005-07-22 14:15
Analysis on the Clockwise Transposition Routing for Dedicated Factoring Devices Tetsuya Izu (FUJITSU Lab./Univ. of Electro-Comm.), Noboru Kunihiro, Kazuo Ohta (Univ. of Electro-Comm.), Takeshi Shimoyama (FUJITSU Lab.) |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
Recently, dedicated factoring devices have attracted much attention since it might be a threat for a current RSA-based PKI. In some devices, the clockwise transposition is used as a key technique, however, because of the lack of theoretic proof of the termination, some additional circuits are required. In this paper, we analyze the packet exchanging rule for the clockwise transposition and propose some possible alternatives with keeping the ``farthest-first'' property. Although we have no theoretic proof of the termination, experimental results show actual availability in the clockwise transposition. We also propose an improvement on the routing algorithm for the relation finding step, which establishes two times speed-up. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
integer factoring / ASIC / RSA / clockwise transposition / YASD / / / |
Reference Info. |
IEICE Tech. Rep., vol. 105, no. 194, ISEC2005-57, pp. 101-107, July 2005. |
Paper # |
ISEC2005-57 |
Date of Issue |
2005-07-15 (ISEC) |
ISSN |
Print edition: ISSN 0913-5685 |
Download PDF |
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Conference Information |
Committee |
ISEC IPSJ-CSEC SITE |
Conference Date |
2005-07-21 - 2005-07-22 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Iwate Prefectural University |
Topics (in Japanese) |
(See Japanese page) |
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Paper Information |
Registration To |
ISEC |
Conference Code |
2005-07-ISEC-IPSJ-CSEC-SITE |
Language |
English (Japanese title is available) |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Analysis on the Clockwise Transposition Routing for Dedicated Factoring Devices |
Sub Title (in English) |
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Keyword(1) |
integer factoring |
Keyword(2) |
ASIC |
Keyword(3) |
RSA |
Keyword(4) |
clockwise transposition |
Keyword(5) |
YASD |
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1st Author's Name |
Tetsuya Izu |
1st Author's Affiliation |
FUJITSU Limited (FUJITSU Lab./Univ. of Electro-Comm.) |
2nd Author's Name |
Noboru Kunihiro |
2nd Author's Affiliation |
University of Electro-Commuinications (Univ. of Electro-Comm.) |
3rd Author's Name |
Kazuo Ohta |
3rd Author's Affiliation |
University of Electro-Commuinications (Univ. of Electro-Comm.) |
4th Author's Name |
Takeshi Shimoyama |
4th Author's Affiliation |
FUJITSU Limited (FUJITSU Lab.) |
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Speaker |
Author-1 |
Date Time |
2005-07-22 14:15:00 |
Presentation Time |
25 minutes |
Registration for |
ISEC |
Paper # |
ISEC2005-57 |
Volume (vol) |
vol.105 |
Number (no) |
no.194 |
Page |
pp.101-107 |
#Pages |
7 |
Date of Issue |
2005-07-15 (ISEC) |