Paper Abstract and Keywords |
Presentation |
2005-07-15 13:25
A 14bit Digitally Self-Calibrated Pipelined ADC with Adaptive Bias Optimization for Arbitrary Speeds up to 40MS/s Hirofumi Matsui, Masaya Ueda, Mutsuo Daito, Kunihiko Iizuka (Sharp) Link to ES Tech. Rep. Archives: ICD2005-60 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
A 14bit digitally self-calibrated pipelined ADC featuring the adaptive bias optimization is fabricated in a 0.18μm CMOS process and consumes 19.2, 33.7, 50.5 and 72.8mW respectively when operating at 10, 20, 30 and 40MS/s. In all the operating speeds with temperature variation up to 80°C, DNL is kept between ±0.60LSB. When operating at 20MS/s, it achieves 73.2dB SNR and 70.4dB SNDR. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Pipelined ADC / Digital Calibration / Calibration Constant / Analog Circuit / Adaptive Bias Optimization / / / |
Reference Info. |
IEICE Tech. Rep., vol. 105, no. 185, ICD2005-60, pp. 31-34, July 2005. |
Paper # |
ICD2005-60 |
Date of Issue |
2005-07-08 (ICD) |
ISSN |
Print edition: ISSN 0913-5685 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Download PDF |
Link to ES Tech. Rep. Archives: ICD2005-60 |
Conference Information |
Committee |
ICD |
Conference Date |
2005-07-14 - 2005-07-15 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Toyohashi Univ. of Tech. |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
LSIs for analog, digital-analog mixed signal processing, sensors, and communication, etc. |
Paper Information |
Registration To |
ICD |
Conference Code |
2005-07-ICD |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
A 14bit Digitally Self-Calibrated Pipelined ADC with Adaptive Bias Optimization for Arbitrary Speeds up to 40MS/s |
Sub Title (in English) |
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Keyword(1) |
Pipelined ADC |
Keyword(2) |
Digital Calibration |
Keyword(3) |
Calibration Constant |
Keyword(4) |
Analog Circuit |
Keyword(5) |
Adaptive Bias Optimization |
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1st Author's Name |
Hirofumi Matsui |
1st Author's Affiliation |
Sharp Corporation (Sharp) |
2nd Author's Name |
Masaya Ueda |
2nd Author's Affiliation |
Sharp Corporation (Sharp) |
3rd Author's Name |
Mutsuo Daito |
3rd Author's Affiliation |
Sharp Corporation (Sharp) |
4th Author's Name |
Kunihiko Iizuka |
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Sharp Corporation (Sharp) |
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Speaker |
Author-1 |
Date Time |
2005-07-15 13:25:00 |
Presentation Time |
25 minutes |
Registration for |
ICD |
Paper # |
ICD2005-60 |
Volume (vol) |
vol.105 |
Number (no) |
no.185 |
Page |
pp.31-34 |
#Pages |
4 |
Date of Issue |
2005-07-08 (ICD) |
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