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| Presentation | 2005-05-27 14:30 Spread-Spectrum Clock Generator for Serial ATA using Fractional PLL controlled by Delta-Sigma Modulator with Level Shifter Takashi Kawamoto, Masaru Kokubo, Takashi Oshima (Hitachi Ltd), Takayuki Noto, Masato Suzuki, Shigeyuki Suzuki, Takashi Hayasaka, Tomoaki Takahashi, Jun Kasai (Renesas Technology Corp.) Link to ES Tech. Rep. Archives:  ICD2005-35 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | The spread spectrum clock generator (SSCG) for Serial ATA with a new architecture is fabricated in a 0.15um CMOS process technology. By using Sigma-Delta modulator with the level shifter and the delay circuit with the feed-forward circuit, the SSCG has the random jitter of 8.1ps and the EMI reduction of 10.0dB due to spread spectrum clocking. In this paper, we show the architecture and the evaluation results of the SSCG using the fractional PLL controlled by Sigma-Delta modulator. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | PLL / Sigma-Delta modulator / Spread-Spectrum / Serial-ATA / EMI / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 105, no. 96, ICD2005-35, pp. 39-44, May 2005. | |
| Paper # | ICD2005-35 | |
| Date of Issue | 2005-05-20 (ICD) | |
| ISSN | Print edition: ISSN 0913-5685 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | Link to ES Tech. Rep. Archives: ICD2005-35 |
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| Conference Information | |
| Committee | ICD |
| Conference Date | 2005-05-26 - 2005-05-27 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kobe Univ. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Paper Information | |
| Registration To | ICD |
| Conference Code | 2005-05-ICD |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Spread-Spectrum Clock Generator for Serial ATA using Fractional PLL controlled by Delta-Sigma Modulator with Level Shifter |
| Sub Title (in English) | |
| Keyword(1) | PLL |
| Keyword(2) | Sigma-Delta modulator |
| Keyword(3) | Spread-Spectrum |
| Keyword(4) | Serial-ATA |
| Keyword(5) | EMI |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Takashi Kawamoto |
| 1st Author's Affiliation | Central Research Lab., Hitachi Ltd (Hitachi Ltd) |
| 2nd Author's Name | Masaru Kokubo |
| 2nd Author's Affiliation | Central Research Lab., Hitachi Ltd (Hitachi Ltd) |
| 3rd Author's Name | Takashi Oshima |
| 3rd Author's Affiliation | Central Research Lab., Hitachi Ltd (Hitachi Ltd) |
| 4th Author's Name | Takayuki Noto |
| 4th Author's Affiliation | Renesas Technology Corp. (Renesas Technology Corp.) |
| 5th Author's Name | Masato Suzuki |
| 5th Author's Affiliation | Renesas Technology Corp. (Renesas Technology Corp.) |
| 6th Author's Name | Shigeyuki Suzuki |
| 6th Author's Affiliation | Renesas Technology Corp. (Renesas Technology Corp.) |
| 7th Author's Name | Takashi Hayasaka |
| 7th Author's Affiliation | Renesas Technology Corp. (Renesas Technology Corp.) |
| 8th Author's Name | Tomoaki Takahashi |
| 8th Author's Affiliation | Renesas Technology Corp. (Renesas Technology Corp.) |
| 9th Author's Name | Jun Kasai |
| 9th Author's Affiliation | Renesas Technology Corp. (Renesas Technology Corp.) |
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| Speaker | Author-1 |
| Date Time | 2005-05-27 14:30:00 |
| Presentation Time | 30 minutes |
| Registration for | ICD |
| Paper # | ICD2005-35 |
| Volume (vol) | vol.105 |
| Number (no) | no.96 |
| Page | pp.39-44 |
| #Pages | 6 |
| Date of Issue | 2005-05-20 (ICD) |
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