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| Presentation | 2005-05-26 13:00 A Loop-Bandwidth Calibration System for Fractional-N Synthesizer and ΔΣ PLL Transmitter Yukinori Akamine, Manabu Kawabe, Kazuyuki Hori, Takao Okazaki (Hitachi), Nigel Tolson (RTE), Masumi Kasahara (Renesas), Satoshi Tanaka (Hitachi) Link to ES Tech. Rep. Archives:  ICD2005-24 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | In this presentation, we propose a new calibration method for loop gain of a delta-sigma PLL transmitter, that can tune loop gain to less than +/- 2% accuracy. The calibration system uses double-integration that integrates VCO output signal over the transient response to a step signal applied to the fractional-N divider. We adopted this calibration system for a delta-sigma PLL transmitter for the GSM mobile phone system, and achieved no more than 2 degrees-rms of GSM standard phase error. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Transmitter / delta-simga PLL / GSM / Loop bandwidth / calibration / Fractional-N / / | |
| Reference Info. | IEICE Tech. Rep., vol. 105, no. 95, ICD2005-24, pp. 23-28, May 2005. | |
| Paper # | ICD2005-24 | |
| Date of Issue | 2005-05-19 (ICD) | |
| ISSN | Print edition: ISSN 0913-5685 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | Link to ES Tech. Rep. Archives: ICD2005-24 |
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| Conference Information | |
| Committee | ICD |
| Conference Date | 2005-05-26 - 2005-05-27 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kobe Univ. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Paper Information | |
| Registration To | ICD |
| Conference Code | 2005-05-ICD |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Loop-Bandwidth Calibration System for Fractional-N Synthesizer and ΔΣ PLL Transmitter |
| Sub Title (in English) | |
| Keyword(1) | Transmitter |
| Keyword(2) | delta-simga PLL |
| Keyword(3) | GSM |
| Keyword(4) | Loop bandwidth |
| Keyword(5) | calibration |
| Keyword(6) | Fractional-N |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Yukinori Akamine |
| 1st Author's Affiliation | Hitachi, Ltd. (Hitachi) |
| 2nd Author's Name | Manabu Kawabe |
| 2nd Author's Affiliation | Hitachi, Ltd. (Hitachi) |
| 3rd Author's Name | Kazuyuki Hori |
| 3rd Author's Affiliation | Hitachi, Ltd. (Hitachi) |
| 4th Author's Name | Takao Okazaki |
| 4th Author's Affiliation | Hitachi, Ltd. (Hitachi) |
| 5th Author's Name | Nigel Tolson |
| 5th Author's Affiliation | Renesas Technology Europe Ltd. (RTE) |
| 6th Author's Name | Masumi Kasahara |
| 6th Author's Affiliation | Renesas Technology Corp. (Renesas) |
| 7th Author's Name | Satoshi Tanaka |
| 7th Author's Affiliation | Hitachi, Ltd. (Hitachi) |
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| Speaker | Author-1 |
| Date Time | 2005-05-26 13:00:00 |
| Presentation Time | 30 minutes |
| Registration for | ICD |
| Paper # | ICD2005-24 |
| Volume (vol) | vol.105 |
| Number (no) | no.95 |
| Page | pp.23-28 |
| #Pages | 6 |
| Date of Issue | 2005-05-19 (ICD) |
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