| Paper Abstract and Keywords |
| Presentation |
2005-05-25 10:30
Router Algorithms for Multiprocessor-based Internet Rouyers
Takashi Shimizu, Kazuaki Obana (NTT), Atsushi Takahara (NTT Bizlink), Kimio Oguchi (Seikei Univ.) |
| Abstract |
(in Japanese) |
(See Japanese page) |
| (in English) |
This paper studies router algorithms in the context of executing them on multiprocessor systems, which are becoming increasingly common in modern high-speed Internet routers.
By modelling the unique environment that is provided by such multiprocessor systems, we identify a couple of design issues for the successful parallel execution of router algorithms, especially by exploring flow-level parallelism. The successful execution depends on the level of concurrency in algorithms, and concurrency is restricted by access contention for shared data resources. We show how flow-level parallelization can reduce access contention, and how we can design multiprocessor-oriented router algorithms.
As an example, we describe the MXQ algorithm, an flow-based AQM algorithm, that is efficiently realized on a multiprocessor system. The real implementation on a real high-speed multiprocessor-based router, and the results of the experiments in a laboratory testbed show that the algorithm can scale well up to tens of thousands of flows at the line rate of 10 Gb/s. |
| Keyword |
(in Japanese) |
(See Japanese page) |
| (in English) |
Packet Processor / Parallel Processing / Parallel MXQ / Active Queue Management / / / / |
| Reference Info. |
IEICE Tech. Rep., vol. 105, no. 79, IA2005-1, pp. 1-6, May 2005. |
| Paper # |
IA2005-1 |
| Date of Issue |
2005-05-18 (IA) |
| ISSN |
Print edition: ISSN 0913-5685 |
| Download PDF |
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| Conference Information |
| Committee |
IA |
| Conference Date |
2005-05-25 - 2005-05-25 |
| Place (in Japanese) |
(See Japanese page) |
| Place (in English) |
Nagoya Univerisity (Higashiyama Campus) |
| Topics (in Japanese) |
(See Japanese page) |
| Topics (in English) |
Internet, etc. |
| Paper Information |
| Registration To |
IA |
| Conference Code |
2005-05-IA |
| Language |
English (Japanese title is available) |
| Title (in Japanese) |
(See Japanese page) |
| Sub Title (in Japanese) |
(See Japanese page) |
| Title (in English) |
Router Algorithms for Multiprocessor-based Internet Rouyers |
| Sub Title (in English) |
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| Keyword(1) |
Packet Processor |
| Keyword(2) |
Parallel Processing |
| Keyword(3) |
Parallel MXQ |
| Keyword(4) |
Active Queue Management |
| Keyword(5) |
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| Keyword(6) |
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| 1st Author's Name |
Takashi Shimizu |
| 1st Author's Affiliation |
Nippon Telegraph and Telephone Corporation (NTT) |
| 2nd Author's Name |
Kazuaki Obana |
| 2nd Author's Affiliation |
Nippon Telegraph and Telephone Corporation (NTT) |
| 3rd Author's Name |
Atsushi Takahara |
| 3rd Author's Affiliation |
NTT BizLink Coporation (NTT Bizlink) |
| 4th Author's Name |
Kimio Oguchi |
| 4th Author's Affiliation |
Seikei University (Seikei Univ.) |
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| Speaker |
Author-1 |
| Date Time |
2005-05-25 10:30:00 |
| Presentation Time |
30 minutes |
| Registration for |
IA |
| Paper # |
IA2005-1 |
| Volume (vol) |
vol.105 |
| Number (no) |
no.79 |
| Page |
pp.1-6 |
| #Pages |
6 |
| Date of Issue |
2005-05-18 (IA) |
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