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Paper Abstract and Keywords
Presentation 2005-01-25 16:50
Architecture for Crossover based on Sequence Pair
Ryousuke Kanemitsu, Akinori Bito, Masaya Yoshikawa, Hidekazu Terai (Ritsumeikan University)
Abstract (in Japanese) (See Japanese page) 
(in English) The floor planning technique that uses GA based on the sequence pair for the solution search is proposed and it obtains an excellent result. However, the problem at the processing time that comes from the multipoint search algorithm exists inside GA. Therefore, GA with hardware is important when thinking GA is applied to the application. In the comparison with software, the prospect of about 160 times the processing speed is obtained (blocks number 250 and generation number 10000).Then, we made GA with hardware and propose the architecture of crossover that is one of the inheritance operations.
Keyword (in Japanese) (See Japanese page) 
(in English) Floorplanning / Sequence pair / GA / Crossover / / / /  
Reference Info. IEICE Tech. Rep., vol. 104, pp. 69-74, Jan. 2005.
Paper #  
Date of Issue 2005-01-18 (VLD, CPSY) 
ISSN Print edition: ISSN 0913-5685
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Conference Information
Committee CPSY VLD IPSJ-SLDM  
Conference Date 2005-01-25 - 2005-01-26 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English) FPGA and its Application, etc 
Paper Information
Registration To IPSJ-SLDM 
Conference Code 2005-01-CPSY-VLD-IPSJ-SLDM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Architecture for Crossover based on Sequence Pair 
Sub Title (in English)  
Keyword(1) Floorplanning  
Keyword(2) Sequence pair  
Keyword(3) GA  
Keyword(4) Crossover  
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1st Author's Name Ryousuke Kanemitsu  
1st Author's Affiliation Ritsumeikan University (Ritsumeikan University)
2nd Author's Name Akinori Bito  
2nd Author's Affiliation Ritsumeikan University (Ritsumeikan University)
3rd Author's Name Masaya Yoshikawa  
3rd Author's Affiliation Ritsumeikan University (Ritsumeikan University)
4th Author's Name Hidekazu Terai  
4th Author's Affiliation Ritsumeikan University (Ritsumeikan University)
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Speaker Author-1 
Date Time 2005-01-25 16:50:00 
Presentation Time 30 minutes 
Registration for IPSJ-SLDM 
Paper # VLD2004-109, CPSY2004-75 
Volume (vol) vol.104 
Number (no) no.589(VLD), no.591(CPSY) 
Page pp.69-74 
#Pages
Date of Issue 2005-01-18 (VLD, CPSY) 


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