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| Presentation | 2004-12-16 16:45 A design of architecture and circuit of data-mining processor Akinori Kanasugi, Masao Ohkura, Mitsuhiro Matsumoto (Tokyo Denki Univ.) Link to ES Tech. Rep. Archives:  ICD2004-192 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | This paper describes the architecture and circuit of rough set processor. The theory of rough sets has a lot of applications such as data mining, decision support system, machine learning and so on. The software tools are not powerful to solve the solutions of large problem in real time. However, no specific processor has been developed. Therefore, the authors have been developing a rough set processor. In this paper, the basic principle, architecture and circuit are described in detail. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Rough sets / Processor / Architecture / / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 104, no. 521, ICD2004-192, pp. 55-58, Dec. 2004. | |
| Paper # | ICD2004-192 | |
| Date of Issue | 2004-12-09 (ICD) | |
| ISSN | Print edition: ISSN 0913-5685 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | Link to ES Tech. Rep. Archives: ICD2004-192 |
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| Conference Information | |
| Committee | ICD |
| Conference Date | 2004-12-16 - 2004-12-17 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Paper Information | |
| Registration To | ICD |
| Conference Code | 2004-12-ICD |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A design of architecture and circuit of data-mining processor |
| Sub Title (in English) | |
| Keyword(1) | Rough sets |
| Keyword(2) | Processor |
| Keyword(3) | Architecture |
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| 1st Author's Name | Akinori Kanasugi |
| 1st Author's Affiliation | Tokyo Denki University (Tokyo Denki Univ.) |
| 2nd Author's Name | Masao Ohkura |
| 2nd Author's Affiliation | Tokyo Denki University (Tokyo Denki Univ.) |
| 3rd Author's Name | Mitsuhiro Matsumoto |
| 3rd Author's Affiliation | Tokyo Denki University (Tokyo Denki Univ.) |
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| Speaker | Author-1 |
| Date Time | 2004-12-16 16:45:00 |
| Presentation Time | 30 minutes |
| Registration for | ICD |
| Paper # | ICD2004-192 |
| Volume (vol) | vol.104 |
| Number (no) | no.521 |
| Page | pp.55-58 |
| #Pages | 4 |
| Date of Issue | 2004-12-09 (ICD) |
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