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Paper Abstract and Keywords
Presentation 2004-10-21 13:00
Power-Minimum Frequency/Voltage Cooperative Management Method in Sub-decimicron Era
Kentaro Kawakami, Miwako Kanamori, Yasuhiro Morita, Jun Takemura, Masayuki Miyama (Kanazawa Univ.), Masahiko Yoshimoto (Kobe Univ.) Link to ES Tech. Rep. Archives: ICD2004-114
Abstract (in Japanese) (See Japanese page) 
(in English) To achieve both of a high peak performance and low average power characteristics, frequency-voltage cooperative control processor has been proposed. Frequency-voltage cooperative control processor schedules its operating frequency according to the required computation power. Its operating voltage or threshold voltage is adequately modulated simultaneously to effectively cut down either switching current or leakage current, and it results in reduction of total power dissipation of the processor. Since a frequency-voltage cooperative control processor has two or more operating frequencies, there are countless scheduling methods exist to realize a certain number of cycles by deadline time. This paper proves two important theorems for frequency-voltage cooperative control processor, which give the power-minimum frequency scheduling method for any types of frequency-voltage cooperative control processor.
Keyword (in Japanese) (See Japanese page) 
(in English) low power / frequency scheduling / dynamic voltage scaling (DVS) / adaptive body biasing / Vdd-hopping / Vth-hopping / /  
Reference Info. IEICE Tech. Rep., vol. 104, no. 365, ICD2004-114, pp. 37-42, Oct. 2004.
Paper # ICD2004-114 
Date of Issue 2004-10-14 (SIP, ICD, IE) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (No. 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF Link to ES Tech. Rep. Archives: ICD2004-114

Conference Information
Conference Date 2004-10-21 - 2004-10-22 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To ICD 
Conference Code 2004-10-IE-SIP-ICD-IPSJ-SLDM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Power-Minimum Frequency/Voltage Cooperative Management Method in Sub-decimicron Era 
Sub Title (in English)  
Keyword(1) low power  
Keyword(2) frequency scheduling  
Keyword(3) dynamic voltage scaling (DVS)  
Keyword(4) adaptive body biasing  
Keyword(5) Vdd-hopping  
Keyword(6) Vth-hopping  
1st Author's Name Kentaro Kawakami  
1st Author's Affiliation Kanazawa University (Kanazawa Univ.)
2nd Author's Name Miwako Kanamori  
2nd Author's Affiliation Kanazawa University (Kanazawa Univ.)
3rd Author's Name Yasuhiro Morita  
3rd Author's Affiliation Kanazawa University (Kanazawa Univ.)
4th Author's Name Jun Takemura  
4th Author's Affiliation Kanazawa University (Kanazawa Univ.)
5th Author's Name Masayuki Miyama  
5th Author's Affiliation Kanazawa University (Kanazawa Univ.)
6th Author's Name Masahiko Yoshimoto  
6th Author's Affiliation Kobe University (Kobe Univ.)
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Date Time 2004-10-21 13:00:00 
Presentation Time 25 
Registration for ICD 
Paper # IEICE-SIP2004-82,IEICE-ICD2004-114,IEICE-IE2004-58 
Volume (vol) IEICE-104 
Number (no) no.363(SIP), no.365(ICD), no.367(IE) 
Page pp.37-42 
#Pages IEICE-6 
Date of Issue IEICE-SIP-2004-10-14,IEICE-ICD-2004-10-14,IEICE-IE-2004-10-14 

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