IEICE Technical Committee Submission System
Conference Paper's Information
Online Proceedings
[Sign in]
... (for ESS/CS/ES/ISS)
Tech. Rep. Archives
... (for ES/CS)
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2004-10-01 11:20
Shielded via structures for high-speed printed circuit boards
Taras Kushta, Kaoru Narita (NEC)
Abstract (in Japanese) (See Japanese page) 
(in English) Shielded via structures formed by signal and ground vias jointly are an important type of vertical transitions providing high-speed data transmission in interconnected circuits embedded in multilayer printed circuit boards (PCBs). These vertical transitions have low leakage losses and well-defined characteristic impedance. In our paper we present study of shielded via structures with round and square arrangements of ground vias surrounding the signal via. Factors effecting on the characteristic impedance of the structures are shown. In particular, numerical and measurement results for vertical transitions in a 12-conductor-layer PCB are presented in the frequency band up to 20GHz and a physical model explaining electromagnetic phenomena in the shielded via structures based on these results are given.
Keyword (in Japanese) (See Japanese page) 
(in English) Electromagnetic Interference / Vias / Multilayer Printed Circuit Boards / Shielding / / / /  
Reference Info. IEICE Tech. Rep., vol. 104, no. 328, EMCJ2004-60, pp. 29-34, Oct. 2004.
Paper # EMCJ2004-60 
Date of Issue 2004-09-24 (EMCJ) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
Download PDF

Conference Information
Committee EMCJ  
Conference Date 2004-10-01 - 2004-10-01 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To EMCJ 
Conference Code 2004-10-EMCJ 
Language English 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Shielded via structures for high-speed printed circuit boards 
Sub Title (in English)  
Keyword(1) Electromagnetic Interference  
Keyword(2) Vias  
Keyword(3) Multilayer Printed Circuit Boards  
Keyword(4) Shielding  
1st Author's Name Taras Kushta  
1st Author's Affiliation NEC Corporation (NEC)
2nd Author's Name Kaoru Narita  
2nd Author's Affiliation NEC Corporation (NEC)
3rd Author's Name  
3rd Author's Affiliation ()
4th Author's Name  
4th Author's Affiliation ()
5th Author's Name  
5th Author's Affiliation ()
6th Author's Name  
6th Author's Affiliation ()
7th Author's Name  
7th Author's Affiliation ()
8th Author's Name  
8th Author's Affiliation ()
9th Author's Name  
9th Author's Affiliation ()
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
Date Time 2004-10-01 11:20:00 
Presentation Time 25 
Registration for EMCJ 
Paper # IEICE-EMCJ2004-60 
Volume (vol) IEICE-104 
Number (no) no.328 
Page pp.29-34 
#Pages IEICE-6 
Date of Issue IEICE-EMCJ-2004-09-24 

[Return to Top Page]

[Return to IEICE Web Page]

The Institute of Electronics, Information and Communication Engineers (IEICE), Japan