IEICE Technical Committee Submission System
Conference Paper's Information
Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2004-09-02 13:00
- -- - --
Norio Yamagaki, Hideki Tode, Koso Murakami (Osaka Univ.)
Abstract (in Japanese) (See Japanese page) 
(in English) Recently, various types of traffic have increased with the development of broadband networks. Thus, the realization of QoS guarantees for each traffic flow is one of the main technical issues. As one of the solutions, routers are required to have some high-speed and flow-based control mechanisms. So far, to improve fairness between flows and achieve the high-speed processing with hardware, we have proposed the packet discarding scheme, DMFQ (Dual Metrics Fair Queueing). In this paper, we extend our implementation of DMFQ by introducing a pipeline technique to speed up packet processing. In addition, we show the design results and verify its accuracy by logic simulation.
Keyword (in Japanese) (See Japanese page) 
(in English) router / packet discarding control / flow succession time / flow management / hardware design / / /  
Reference Info. IEICE Tech. Rep., vol. 104, no. 272, NS2004-84, pp. 1-4, Sept. 2004.
Paper # NS2004-84 
Date of Issue 2004-08-26 (NS, IN, CS) 
ISSN Print edition: ISSN 0913-5685
Download PDF

Conference Information
Committee NS CS IN  
Conference Date 2004-09-02 - 2004-09-03 
Place (in Japanese) (See Japanese page) 
Place (in English) Tohoku University 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Active networks, IP-VPN, network security, ultra high-speed networks, p2p communications, network software, etc. 
Paper Information
Registration To NS 
Conference Code 2004-09-NS-CS-IN 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English)
Sub Title (in English)
Keyword(1) router  
Keyword(2) packet discarding control  
Keyword(3) flow succession time  
Keyword(4) flow management  
Keyword(5) hardware design  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Norio Yamagaki  
1st Author's Affiliation Osaka University (Osaka Univ.)
2nd Author's Name Hideki Tode  
2nd Author's Affiliation Osaka University (Osaka Univ.)
3rd Author's Name Koso Murakami  
3rd Author's Affiliation Osaka University (Osaka Univ.)
4th Author's Name  
4th Author's Affiliation ()
5th Author's Name  
5th Author's Affiliation ()
6th Author's Name  
6th Author's Affiliation ()
7th Author's Name  
7th Author's Affiliation ()
8th Author's Name  
8th Author's Affiliation ()
9th Author's Name  
9th Author's Affiliation ()
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
Speaker Author-1 
Date Time 2004-09-02 13:00:00 
Presentation Time 25 minutes 
Registration for NS 
Paper # NS2004-84, IN2004-43, CS2004-39 
Volume (vol) vol.104 
Number (no) no.272(NS), no.274(IN), no.276(CS) 
Page pp.1-4 
#Pages
Date of Issue 2004-08-26 (NS, IN, CS) 


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan