吉田
典可
- Y. Kamidoi, S. Wakabayashi and N. Yoshida
An efficient hypergraph bisection algorithm of partitioning VLSI circuits
IEICE Trans. Fundamentals, Vol.E57-A, No10, pp.1272-1279, 1992
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T. Koide, S. Wakabayashi and N.Yoshida
Pin assignment with global routing for VLSI building block layout
IEEE Trans. on Computer-Aided Design of Integrated Circuits and
Systems,
VOL.15, No.12,pp.1575-1583, 1996
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Y. Kamidoi, S. Wakabayashi and N. Yoshida
A divide and conquer approach to the minimum k-way cut problem
Algorithmica(2001), Springer-on-line first publication, OF-1-OF-15,
DOI:10.1007/s00453-001-0070-2(printed publication in press)
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