| 抄録（英） |
Power supply voltage of LSI has been lowered due to system requirementsfor low power dissipation. An on-chip power-on reset pulse generation circuitis used to determine the initial state of the memory devices of the system LSI.This report describes a power-on reset pulse generation circuit for low voltagetechnology.Hardware measurement proves improved pulse height relative to various power-onprofiles (slope, rise time etc.) and process fluctuations. Further, the designprovides robust noise immunity against voltage fluctuations on the power supplyline. The circuit is implemented within a small area (115 um X 345 um) in theinput/output buffer area of a system LSI with 0.25-um four-layer-metal CMOStechnology. |