Advancing Information and Telecommunication: Bridging Theory and Application

SUPPORTED BY

IEICE TC on IT
PENS
BRIN

πŸ“’ Recent Updates (Last updated: July 31, 2026)

🎀

Prof. Muramatsu's Invited Talk Scheduled: Prof. Jun Muramatsu (Waseda University) will deliver his invited talk "Coding Theorems Based on Constrained-Random Number Generators" on August 2, 11:30–12:10 in Room 7 - Kresna. See the Schedule section and Speakers section below for details.

πŸ—“οΈ

IEICE Presentation Schedule Announced: The presentation time slots and room assignments for IEICE TC on IT related talks within the IES 2026 Parallel Sessions are now available. See the new Schedule section below.

🏞️

Lava Tour (Aug 3): The city/cultural tour is officially named the "Lava Tour." Fee updated to IDR 300,000 (~JPY 3,000) per participant. Half-day program expected to end around 15:00 back at the venue (exact time being confirmed). Please note the tour is not expected to visit Borobudur Temple.

πŸ’³

Meal Package Payment: In addition to cash, credit/debit card payment (EDC) is now available at the registration desk.

πŸš—

Airport Pickup β€” Free of Charge: Airport pickup for Japanese participants is now confirmed to be provided free of charge by the organizing committee. Participants who would like pickup arranged can submit their flight details via the form in the Travel & Logistics section below. Please note that due to varying return flight schedules, we may not be able to accommodate every request.

πŸ“±

Action Needed: If you would like airport pickup arranged, please submit your flight details (arrival & departure) and your WhatsApp number as soon as possible via the form in the Travel & Logistics section below. The organizing committee will use this to create a coordination group with the pickup drivers.

International Collaboration

About the Workshop

The Advancing Information and Telecommunication: Bridging Theory and Application workshop is a strategic collaborative initiative between IEICE TC on IT (Japan), IES–PENS, and BRIN (Indonesia). Hosted in Yogyakarta, Indonesia, this event brings together researchers, engineers, and practitioners to strengthen the connection between theoretical innovation and real-world technological solutions in information and telecommunication systems.

The workshop highlights cross-disciplinary topics such as signal processing, networking architectures, IoT and AI-driven systems, 5G/6G communication, and resilient digital infrastructures. Through technical presentations, invited talks, and interactive sessions, participants will explore how fundamental theories can lead to impactful implementations across industries and research communities.

Student participation is strongly encouraged as part of our commitment to cultivating the next generation of innovators. Students are invited to present their research, share prototypes, and engage in feedback sessions designed to promote international mentorship and collaboration between Japan and Indonesia.

Join us in Yogyakarta to bridge theory and applicationβ€”where ideas evolve into innovation, and future researchers find their voice.

Event Details & Venue

Workshop Begins In

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Date

August 1–3, 2026

Three-day intensive workshop

Location

Yogyakarta, Indonesia

Sahid Raya Yogyakarta Hotel & Convention Yogyakarta

Format

Hybrid Event

Onsite & virtual access

Registration

Coming Soon

Details to be announced

πŸ“ Sahid Raya Yogyakarta Hotel & Convention Yogyakarta

Jl. Magelang No.Km 6, Yogyakarta, Indonesia

Open in Google Maps

Discover Yogyakarta

Experience the cultural heart of Java, where ancient heritage meets modern hospitality. Yogyakarta offers unforgettable experiences for international visitors.

Travel Tips for International Visitors

Currency

Indonesian Rupiah (IDR). ATMs widely available. Credit cards accepted at hotels and restaurants.

Language

Bahasa Indonesia and Javanese. English spoken in tourist areas and hotels. Translation apps recommended.

Transportation

Airport 30min from city. Use Grab/Gojek apps for taxis. Rent motorbikes or use local transport (becak).

Travel & Logistics

Optional add-ons and helpful information for participants traveling to Yogyakarta.

Meal Package

Optional add-on (IES Registration)

IDR 1,500,000

(~JPY 15,000 per participant)

  • β€’Aug 1: Lunch, coffee breaks, Gala Dinner
  • β€’Aug 2: Lunch, coffee breaks
  • β€’Dinner on Aug 2 is not included

Payment: Cash or Credit Card (EDC machine available at registration desk). Payable starting the morning of August 1.

Lava Tour

Optional half-day tour (August 3)

IDR 300,000

(per participant, approx.)

  • β€’Includes transportation and lunch
  • β€’Destination: Mount Merapi area (Lava Tour). Borobudur Temple is not included.
  • β€’Half-day program: starts in the morning, returns to the venue around 15:00 (exact time being confirmed)

Sign-up & Payment: During on-site registration (July 31 or Aug 1). Cash or Credit Card (EDC) accepted.

Airport Pickup

Free of charge for Japanese participants

Airport pickup for Japanese participants is arranged by the organizing committee free of charge. Please share your flight information (and WhatsApp number) using the form below.

  • β€’Fee: Free (provided by the organizing committee)
  • β€’As return flights vary widely, we may not be able to accommodate every request

Please submit your arrival & departure flight details (date, time, and flight number β€” e.g., GA204) and your WhatsApp number as early as possible. The organizing committee will use this to set up a coordination group with the drivers.

Submit Flight Info & WhatsApp Number

Important Dates

IEICE TC on IT Track

MilestoneDate
Abstract Submission Deadline15 May 2026
Acceptance NotificationWithin 10 days of submission
Camera-ready Submission9 July 2026
Registration DeadlineTBA
Workshop DatesAugust 1–3, 2026

IES Track

MilestoneDate
Paper Submission DeadlineApril 5, 2026
Notification of Paper AcceptanceMay 18, 2026
Early Bird RegistrationMay 27, 2026
Registration DeadlineJuly 15, 2026
Camera-ready SubmissionJuly 18, 2026
Main ConferenceAugust 1–3, 2026

Two Tracks: Which One Is Right for You?

This workshop offers two distinct publication tracks. Understanding the differences will help you choose the best option for your research goals.

Aspect IEICE Workshop Track IES Track
Submission Method IEICE Portal
(Abstract β†’ Manuscript)
Single-Step:
EDAS (Full Paper)
Review Process Quick screening (10 days) Double-blind peer review
Abstract Deadline May 15, 2026 -
Paper Deadline July 9, 2026 April 5, 2026
Registration Fee 3,300 JPY
(~$20 USD)
$150–$350 USD
(Varies by category, see IES website)
Publication Type IEICE Technical Report (Non Scopus) IEEE Xplore (Scopus)
Topic Focus IT, Telecommunications, Signal Processing, Networking Power Systems, Robotics, IoT, AI, Biomedical, Telecommunications & more
(View all tracks)
Payment Timing During manuscript submission (IEICE Portal) After acceptance (Separate step)

IEICE Workshop Track

Advantages

  • βœ“ Lower barrier to entry: Submit abstract first, write full paper only if accepted
  • βœ“ Fast feedback: Know if your topic fits within 10 days
  • βœ“ Later deadline: More time to prepare full manuscript
  • βœ“ Affordable: Low registration fee (3,300 JPY)
  • βœ“ International visibility: IEICE collaboration with Japan
  • βœ“ Ideal for work-in-progress: Present early-stage research

Remarks

  • βœ— Two-step submission: Must complete BOTH Abstract AND Paper submission
  • βœ— Less rigorous review: No formal peer review process
  • βœ— Technical Report format: Not as prestigious as IEEE proceedings
  • βœ— Narrow scope: Must fit IT/telecommunications topics
  • βœ— Separate payment portal: Payment handled in IEICE system

IES Track

Advantages

  • βœ“ Higher prestige: IEEE-standard proceedings with formal peer review
  • βœ“ Simpler process: Submission via familiar EDAS platform
  • βœ“ Rigorous feedback: Constructive reviewer comments improve your work
  • βœ“ Broader topics: Welcome all electronics and engineering fields
  • βœ“ Better for CVs: IEEE-compatible publication carries more weight
  • βœ“ Clear workflow: Established EDAS system, no dual submission

Remarks

  • βœ— Earlier deadline: Full paper due April 5
  • βœ— Higher risk: Write full paper before knowing if it will be accepted
  • βœ— More competitive: Rigorous review may lead to rejection
  • βœ— Higher cost: Registration fees $150-$350 USD
  • βœ— Slower feedback: Review process takes longer than 10 days

Manuscript Submission Guidelines

IEICE TC on IT Track

Abstract β†’ Quick Review β†’ Full Manuscript

A

Phase A: Submit Abstract

Submit your abstract (max 250 words, text only) via the IEICE Portal below. Include title, authors, affiliation, email, and indicate if you'll participate offline.

B

Phase B: Review & Notification

Your abstract undergoes quick review by the technical committee. You'll receive acceptance notification within 10 days of submission.

C

Phase C: Full Manuscript (IEICE System)

After acceptance, submit your full manuscript through the official IEICE submission portal (ordinary submission only).

Submit Abstract (IEICE Portal)

After the quick review, you will receive an acceptance notification together with a manuscript submission request by email.

Full manuscript submission available after abstract acceptance

🍽️ Optional Meal Package (IEICE Participants)

Lunch and coffee breaks during the workshop are available as an optional add-on. Participants who wish to join meals may purchase a meal package separately.

Estimated cost: Β₯10,000–Β₯20,000 for the full workshop period (details currently being finalized).

Payment will be available on-site by cash or card.

IES Track

"Cyber-Physical Systems and Society"

1

Prepare Full Paper

Write your complete manuscript following IEEE or IES formatting guidelines. Include abstract, introduction, methodology, results, and references.

2

Submit via EDAS

Register an account on EDAS (if you don't have one) and submit your full paper through the IES submission portal.

3

Peer Review

Your paper will undergo double-blind peer review. Reviewers will evaluate technical quality, originality, and clarity.

4

Camera-ready & Registration

After acceptance, revise your paper according to reviewer feedback and submit the final camera-ready version. Complete registration and payment.

Submit via EDAS View IES 2026 Details (Topics, Fees, etc.)

For complete information on tracks, registration fees, and payment details, visit the official IES 2026 website

Formatting Requirements

IEICE Track

  • Abstract: 200-300 words
  • Full manuscript: Follow IEICE template
  • Language: English
  • File format: PDF for review, LaTeX/Word source for final

IES Track

  • Full paper: 4-6 pages (IEEE format recommended)
  • Language: English
  • File format: PDF for submission
  • Blind review: Remove author names/affiliations from submitted PDF

IEICE Student Membership Benefits

Students are encouraged to register as IEICE student members to enjoy special benefits, including discounted registration fees, access to exclusive resources, and networking opportunities with leading researchers in information and communication engineering.

Workshop Speakers

Speaker from IEICE Representative

Prof. Jun Muramatsu Google Scholar

Waseda University, Japan, IEICE TC on IT

Presentation Topic: Coding Theorems Based on Constrained-Random Number Generators

πŸ—“οΈ August 2  |  11:30–12:10  |  Room 7 - Kresna  |  Invited Talk

Dr. Jun Muramatsu received his B.S., M.S., and Ph.D. degrees in Mathematics from Nagoya University, Japan, in 1990, 1992, and 1998, respectively. From 1992 to 2025, he was with the Nippon Telegraph and Telephone Corporation (NTT), where he served as a Research Scientist at NTT Communication Science Laboratories. He also held an international research appointment as a visiting researcher at ETH ZΓΌrich, Switzerland (2007–2008). In 2025, he joined the Faculty of Science and Engineering at Waseda University, Japan, as a Professor. His research interests span the foundations of information theory, Shannon theory, source and channel coding, random number generation, and information-theoretic security.

Speaker from PENS

Prof. I Gede Puja Astawa Google Scholar

Politeknik Elektronika Negeri Surabaya (PENS), Indonesia

Presentation Topic: A Real-Time SDR Testbed for Joint PAPR Reduction and Power Amplifier Linearization in MIMO-OFDM Wireless Systems

Prof. I Gede Puja Astawa received his B.S. and M.S. degrees from Institut Teknologi Sepuluh Nopember Surabaya (ITS), Indonesia in 1993 and 2006,respectively. He received his Ph.D. degree from the Nara Institute of Science and Technology (NAIST), Japan, in 2012. He is currently with the Politeknik Elektronika Negeri Surabaya (PENS), where he serves as a Professor in the Department of Electrical Engineering. His research interests in wireless communications, signal processing include OFDM and MIMO systems, physical-layer security, peak-to-average power ratio (PAPR) reduction techniques, and real-time experimental validation using SDR platforms.

Speaker from BRIN

Dr. Budiman Putra Asmaur Rohman Google Scholar

Badan Riset dan Inovasi Nasional (BRIN), Indonesia

Presentation Topic: Convergence of Communication, Sensing, and Computation for Intelligent Wireless Systems

Dr. Budiman Putra Asmaur Rohman received his B.Eng. degree in Engineering Physics from Institut Teknologi Sepuluh Nopember, Indonesia, in 2009. He earned his M.Eng. in Computer Science and Electrical Engineering and his Ph.D. in Human and Environmental Informatics from Kumamoto University, Japan, in 2018 and 2021, respectively. Since 2015, Dr. Rohman has been with the National Research and Innovation Agency (BRIN), Indonesia. He has also held international research appointments, including as a visiting researcher at Fraunhofer FHR, Germany (2020), and as a researcher at Kumamoto University, Japan (2021–2022). In 2022, he joined the School of Electrical Engineering at Telkom University, Indonesia. His research interests span signal processing, machine learning, radar systems, and embedded systems.

IEICE TC on IT Presentations at IES 2026

The following IEICE TC on IT related presentations are scheduled within the IES 2026 Parallel Oral Sessions.
(Schedule based on the IES 2026 Parallel Session program, updated as of July 28, 2026 β€” subject to change)

Day 1 β€” August 1, 2026

Time Room Title Authors
17:00–17:15 Room 5
(Bima 2)
Time-dependent weight functions for iterative reweighting Lasso Masanari Yasuda, Kazushi Mimura, Kazunori Iwata, Takeaki Shimokawa (Hiroshima City Univ.)
17:00–17:15 Room 6
(Bima 1)
A Preliminary Study on Mutual-Information Optimization for Linear Gaussian Communication DAGs Tadashi Wadayama (NiTech)
17:00–17:15 Room 7
(Kresna)
A study on performance for associative memory with high order interactions Yuto Sakurai, Takeaki Shimokawa, Kazunori Iwata, Kazushi Mimura (Hiroshima City Univ.)

Day 2 β€” August 2, 2026

Time Room Title Authors
11:30–12:10 Room 7 - Kresna Invited Talk
Coding Theorems Based on Constrained-Random Number Generators
Jun Muramatsu (Waseda University)
15:00–15:15 Room 2
(Sadewa)
An Extension of the Verilog-to-Routing Tool to Support Clock Routing via General Routing Channels in FPGA Safira Adine Kinari, Minoru Watanabe, Nobuya Watanabe (Okayama University)
15:00–15:15 Room 5
(Bima 2)
A Note on Check-Family Selection for Local Repair of Binary Linear Codes Koki Kazama (Shonan Institute of Technology), Takahiro Yoshida (Nihon Univ.)
15:15–15:30 Room 5
(Bima 2)
Evaluation of the Entropy of Amida-Kuji as a Random Permutation Generator Yuichi Kaji (Nagoya Univ.)
15:30–15:45 Room 2
(Sadewa)
Toward Reducing PBS Executions in TFHE via Phase-Matching Boolean Gate Representations Yuto Kitadai, Yasuyuki Nogami, Yuta Kodera (Okayama Univ.)
15:30–15:45 Room 3
(Arjuna 2)
A Study on Uniqueness of Trace Vectors for Gauss Period Normal Basis via CVMA Matrix Yasuyuki Nogami, Hiro Fukui, Yuta Kodera (Okayama Univ.)
15:30–15:45 Room 6
(Bima 1)
Blind Per-Bit Z-Channel Estimation and CA-SCL Decoding for Reverse Fuzzy Extractors over Heterogeneous Channels Jun Asatani (OUS)
15:30–15:45 Room 7
(Kresna)
Refining Decisional Problems with Self-Reducibility for Lossy Identification Schemes Bagus Santoso (UEC)
Note: This schedule follows the official IES 2026 Parallel Session program (updated as of July 28, 2026). Actual timing may shift slightly depending on session progress on the day. Please confirm room assignments on-site or on the notice boards.

Organizing Committee

Advisory Board

Ir. Muhammad Hamka Ibrahim

Dr. Muhammad Hamka Ibrahim

Head of IEICE Indonesia Section

General Chairs

Prof. Yasuyuki Nogami

Prof. Yasuyuki Nogami

Okayama University, IEICE TC on IT, Japan

Prof. Amang Sudarsono

Prof. Amang Sudarsono

Politeknik Elektronika Negeri Surabaya, Indonesia

Prof. Nasrullah Armi

Prof. Nasrullah Armi

Badan Riset dan Inovasi Nasional, Indonesia

Technical Program Chairs

Prof. Agus Subekti

Prof. Agus Subekti

Badan Riset dan Inovasi Nasional, Indonesia

Organizing Committee

Dr. Maya Rahayu

Dr. Maya Rahayu

Politeknik Negeri Bandung, Indonesia

Safira Adine Kinari

Safira Adine Kinari

Okayama University, IEICE TC on IT, Japan

Galih Nugraha Nurkahfi

Galih Nugraha Nurkahfi

Badan Riset dan Inovasi Nasional, Indonesia

Publication Chairs

Amma Liesvarastranta Haz

Amma Liesvarastranta Haz

Politeknik Elektronika Negeri Surabaya, Indonesia

Naufal Adi Satrio

Naufal Adi Satrio

Politeknik Elektronika Negeri Surabaya, Indonesia

Technical Program Committee

Kazushi Mimura

Kazushi Mimura

Hiroshima City University, Japan

Masanari Yasuda

Masanari Yasuda

Hiroshima City University, Japan

Shamim Sardar

Shamim Sardar

3rd Year, Lab Info Security

Okayama University, Japan

Network Security, ML, LLM

Yuto Sakurai

Yuto Sakurai

Hiroshima City University, Japan

Visa Information for Indonesia

Essential visa information for international participants attending the workshop in Yogyakarta, Indonesia.

Visa-Free Entry

Citizens of 17 countries/regions can enter Indonesia visa-free for up to 30 days (non-extendable).

Eligible countries/regions:

ASEAN: Brunei, Cambodia, Laos, Malaysia, Myanmar, Philippines, Singapore, Thailand, Vietnam, Timor Leste
Americas: Brazil, Colombia, Peru, Suriname
Asia: Hong Kong (SAR)
Middle East: TΓΌrkiye
+ Singapore Permanent Residents via specific checkpoints

Official immigration website β†’

Visa on Arrival

Available for 97 countries at major Indonesian airports including Yogyakarta.

Fee: IDR 500,000 (~USD 35)

Valid for 30 days, extendable once for another 30 days

Major eligible countries:

USA, UK, Japan, South Korea, China, Australia, Canada, Germany, France, Italy, Spain, India, Russia, UAE, and many more.

E-Visa

Apply online before travel through Indonesia's official e-Visa system.

Processing: 3-5 business days

Recommended for longer stays or business purposes

General Requirements

All Visitors Must Have:

  • β€’ Passport valid for at least 6 months from entry date
  • β€’ Return or onward flight ticket
  • β€’ Proof of accommodation (hotel booking)
  • β€’ Sufficient funds for duration of stay

Important Notes:

  • β€’ Visa-free entry is NOT extendable
  • β€’ Check latest requirements before travel
  • β€’ Health insurance recommended
  • β€’ Check Indonesia's customs regulations

Need Visa Assistance?

Our organizing committee can provide invitation letters for visa applications if required.

Contact Us

IEICE TC on IT Contact

IES Contact

General Inquiries

For questions about paper submissions, registration, or general workshop information, please contact the organizing committee at: it-sec@mail.ieice.org