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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
DC 2022-12-16
13:10		 Yamaguchi
(Primary: On-site, Secondary: Online)		 On Improving the Accuracy of LSI Small Delay Fault Diagnosis
Shinnosuke Fujita, Stefan Holst, Xiaoqing Wen (Kyutech) DC2022-72		 With today's tight timing margins, increasing manufacturing variation, and the development of nanometer technology, timi... [more] DC2022-72
pp.1-6
AP 2016-01-15
13:40		 Tokyo Takushoku University, Hachiouji Campus Antenna Arrangement Suitable for MIMO Full-Duplex -- Experimental Evaluation of Interference Reduction Effect Using Prototype Antenna --
Masakuni Tsunezawa, Naoki Honma, Kazuya Takahashi (Iwate Univ.), Kentaro Murata (NDA), Kentaro Nishimori (Niigata Univ.), Yoshitaka Tsunekawa (Iwate Univ.) AP2015-182		 In this report, we discuss an interference reduction technique using a multiple-input multiple-output(MIMO) antenna arra... [more] AP2015-182
pp.83-88
AP 2015-03-20
09:55		 Fukui Fukui University, Bunkyou Campus Self-Interference Cancellation Technique for SDD Arrays Using Infinite Ground Plane
Kentaro Murata (NDA), Naoki Honma (Iwate Univ.), Kentaro Nishimori (Niigata Univ.), Hisashi Morishita (NDA) AP2014-216		 Recently, a full duplex communication using space division duplex (SDD) method has been proposed. A SDD method enables s... [more] AP2014-216
pp.29-34
SDM 2011-12-16
15:40		 Nara NAIST Proposal of Optimized Structure of X-Ray Detectors Reducing Effect of Fixed Charges at SiO2/Si interface
Ryota Okada, Seiji Nishikawa, Hideharu Matsuura (Osaka Electro-Communication Univ.) SDM2011-144		 Several regulations for hazardous substances have been enforced due to the increase of awareness of environmental issues... [more] SDM2011-144
pp.65-70
VLD, ICD, DC, IPSJ-SLDM 2005-11-30
16:10		 Fukuoka Kitakyushu International Conference Center Logic Synthesis Technique for High Speed Dynamic Logic with Asymmetric Slope Transition
Masao Morimoto, Makoto Nagata (Kobe Univ.), Kazuo Taki 		This paper proposes a logic synthesis technique for asymmetric slope differential dynamic logic (ASDDL) circuits. The te... [more] VLD2005-58 ICD2005-153 DC2005-35
pp.25-30
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