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Committee Date Time Place Paper Title / Authors Abstract Paper #
CPSY, VLD, RECONF, IPSJ-SLDM [detail] 2013-01-16
16:00		 Kanagawa   Break Even Time Evaluation of Run-Time Power Gating Control by On-chip Leakage Monitor
Kensaku Matsunaga, Masaru Kudo (SIT), Yuya Ohta, Nao Konishi (SIT), Hideharu Amano (KU), Ryuichi Sakamoto, Mitaro Namiki (TUAT), Kimiyoshi Usami (SIT) VLD2012-118 CPSY2012-67 RECONF2012-72		 Run-time Power Gating (RTPG) reduces leakage energy by turning off a power switch(PS) for idle periods of a circuit duri... [more] VLD2012-118 CPSY2012-67 RECONF2012-72
pp.63-68
VLD 2012-03-07
15:15		 Oita B-con Plaza Power-Switch Drive-circuit generation for Ground-Bounce reduction using the Genetic-Programming
Makoto Miyauchi, Masaru Kudo, Yuya Ohta, Kimiyoshi Usami (Shibaura Institute of Tech.) VLD2011-142		 Ground Bounce noise is a serious problem Power Gating technology. In this research, as compared with the Daisy Chain whi... [more] VLD2011-142
pp.133-138
VLD 2012-03-07
16:05		 Oita B-con Plaza Leakage Energy Reduction of Sub-Threshold Circuits by Body Bias Control for Power Switch
Ryo Mitsuhashi, Masaru Kudo, Yuya Ohta, Kimiyoshi Usami (Shibaura Institute of Tech.) VLD2011-144		 Power Gating (PG) is one of the technologies for reducing leakage energy. The effectiveness of leakage energy reduction ... [more] VLD2011-144
pp.145-150
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2011-11-30
11:20		 Miyazaki NewWelCity Miyazaki Power-Gating Circuit Scheme for Transient-Glitch Energy Reduction
Yuya Ohta, Masaru Kudo, Kimiyoshi Usami (Shibaura Institute of Tech.) VLD2011-90 DC2011-66		 In fine-grain power gating which performs cell-by-cell power gating (PG) , energy overhead consumed at sleep-in and slee... [more] VLD2011-90 DC2011-66
pp.221-226
DC, CPSY
(Joint)		 2011-07-29
09:00		 Kagoshima   Reducing Leakage Power Consumption of Functional Units with Fine-grained Power Gating
Weihan Wang (Keio Univ.), Yuya Ohta (Shibaura inst. of tech.), Lei Zhao (Keio Univ.), Yoshifumi Ishii (Keio univ.), Kimiyoshi Usami (Shibaura inst. of tech.), Hideharu Amano (Keio Univ.) CPSY2011-9		 High speed power gating techniques are useful for reducing leakage power by functional units of CPU core. This paper pre... [more] CPSY2011-9
pp.1-6
VLD 2010-03-11
13:55		 Okinawa   Implementation Scheme for Power Gating and its Influence to Energy Reduction
Yuya Ohta, Satoshi Koyama, Tatsunori Hashida, Tetsuya Muto, Tatsuya Yamamoto, Kimiyoshi Usami (Shibaura Institute of Tech.) VLD2009-113		  [more] VLD2009-113
pp.85-90
 Results 1 - 6 of 6  /   
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