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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| CPSY, DC, IPSJ-ARC [detail] | 2023-08-03 16:25 |
Hokkaido | Hakodate Arena (Primary: On-site, Secondary: Online) |
 CPSY2023-16 DC2023-16 |
(To be available after the conference date) [more] | CPSY2023-16 DC2023-16 pp.49-54 |
| CPSY, DC, IPSJ-ARC [detail] | 2023-08-04 16:50 |
Hokkaido | Hakodate Arena (Primary: On-site, Secondary: Online) |
CPSY2023-24 DC2023-24 |
[more] | CPSY2023-24 DC2023-24 pp.94-99 |
| DC, CPSY, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] | 2023-03-23 14:55 |
Kagoshima | Amagi Town Disaster Prevention Center (Tokunoshima) (Primary: On-site, Secondary: Online) |
CPSY2022-36 DC2022-95 |
(To be available after the conference date) [more] | CPSY2022-36 DC2022-95 pp.13-18 |
| DC, CPSY, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] | 2023-03-24 13:15 |
Kagoshima | Amagi Town Disaster Prevention Center (Tokunoshima) (Primary: On-site, Secondary: Online) |
CPSY2022-46 DC2022-105 |
(To be available after the conference date) [more] | CPSY2022-46 DC2022-105 pp.72-76 |
| SCE | 2022-08-09 11:00 |
Online | Online | Recursive Cell Placement Method for High-Throughput Single Flux Quantum Logic Circuits Kento Kitamura, Takahiro Kawaguchi, Naofumi Takagi (Kyoto Univ.) SCE2022-4 |
(To be available after the conference date) [more] | SCE2022-4 pp.18-23 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2021-12-02 10:35 |
Online | Online | Calculation method of correctly rounded exponential function on an FPGA Takuya Haraguchi, Naofumi Takagi (Kyoto Univ.) VLD2021-35 ICD2021-45 DC2021-41 RECONF2021-43 |
We propose the FPGA-oriented calculation method of correctly rounded exponential function, exp, which is one of the func... [more] | VLD2021-35 ICD2021-45 DC2021-41 RECONF2021-43 pp.105-110 |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] | 2020-01-24 13:30 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | An FPGA implementation of arc-sine high-radix CORDIC algorithm Hiroshi Matsuoka, Naofumi Takagi (Kyoto Univ.), Kazuyoshi Takagi (Mie Univ.) VLD2019-86 CPSY2019-84 RECONF2019-76 |
We consider the realization of the circuit on the FPGA based on the high radix CORDIC algorithm that we proposed for cal... [more] | VLD2019-86 CPSY2019-84 RECONF2019-76 pp.193-197 |
| SCE | 2020-01-17 13:15 |
Kanagawa | [Poster Presentation]
A Routing Method with Wire Length Matching for RSFQ Logic Circuits Using Thin PTLs Kei Kitamura (Kyoto Univ), Kazuyoshi Takagi (Mie Univ), Naofumi Takagi (Kyoto Univ) SCE2019-35 |
A routing method with wire length matching using thin PTLs for RSFQ circuits is proposed. For AIST-ADP2 fabrication tech... [more] | SCE2019-35 pp.23-25 |
|
| VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2019-11-14 15:05 |
Ehime | Ehime Prefecture Gender Equality Center | High-Radix CORDIC algorithm for calculating arc-sine and arc-cosine Hiroshi Matsuoka, Naofumi Takagi (Kyoto Univ.) VLD2019-42 DC2019-66 |
We propose high-radix CORDIC algorithm that calculate arc-sine and arc-cosine. CORDIC is used to calculating triangular ... [more] | VLD2019-42 DC2019-66 pp.109-113 |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] | 2019-01-30 15:30 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | An integrated development platform of FPGA for ROS-based autonomous mobile robot Sou Tamura, Yasuhiro Nitta, Hideki Takase, Kazuyoshi Takagi, Naofumi Takagi (Kyoto Univ) VLD2018-79 CPSY2018-89 RECONF2018-53 |
[more] | VLD2018-79 CPSY2018-89 RECONF2018-53 pp.43-48 |
| RECONF | 2018-05-24 14:55 |
Tokyo | GATE CITY OHSAKI | An feasibility study of an automatic selection method for SW/HW communication interface in SWORDS framework Yasuhiro Nitta, Hideki Takase, Kazuyoshi Takagi, Naofumi Takagi (Kyoto Univ.) RECONF2018-8 |
[more] | RECONF2018-8 pp.39-44 |
| CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] | 2018-03-07 17:20 |
Shimane | Okinoshima Bunka-Kaikan Bldg. | Calculation method for double-precision floating-point sine and cosine functions on an FPGAs Yukio Toyoshima, Naofumi Takagi (Kyoto Univ.) CPSY2017-138 DC2017-94 |
[more] | CPSY2017-138 DC2017-94 pp.113-117 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2017-11-07 13:00 |
Kumamoto | Kumamoto-Kenminkouryukan Parea | Calculation method of exponential function on FPGAs using high-radix STL method Yasufumi Fujiwara, Kazuyoshi Takagi, Naofumi Takagi (Kyoto Univ.) RECONF2017-46 |
We propose the calculation method of double precision floating point exponential function for FPGA with correct rounding... [more] | RECONF2017-46 pp.55-59 |
| SCE | 2017-04-21 13:45 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | An RSFQ Pattern Matching Circuit Based on Systolic Architecture Kazuyoshi Takagi, Masaya Ohata, Naofumi Takagi (Kyoto Univ.) SCE2017-7 |
We propose a regular expression pattern matching circuit using rapid single flux quantum (RSFQ) circuit. Proposed circu... [more] |
SCE2017-7 pp.35-39 |
| CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] | 2017-03-10 14:50 |
Okinawa | Kumejima Island | Double-precision floating-point logarithm calculation method for FPGA Yasufumi Fujiwara, Kazuyoshi Takagi, Naofumi Takagi (Kyoto Univ.) CPSY2016-156 DC2016-102 |
Floating-point arithmetic standard IEEE 754 was revised in 2008, and it presents 36 functions that should be calculated ... [more] | CPSY2016-156 DC2016-102 pp.363-367 |
| SCE | 2016-04-20 14:40 |
Tokyo | On-chip Implementation of Random-Access-Memory and RSFQ Microprocessor with High-Functionality Ryo Sato (Nagoya Univ.), Yuki Ando (Kyoto Univ.), Masamitsu Tanaka, Akira Fujimaki (Nagoya Univ.), Kazuyoshi Takagi, Naofumi Takagi (Kyoto Univ.) SCE2016-5 |
The single flux quantum (SFQ) microprocessor demonstrated so far was not able to run meaningful programs due to the limi... [more] | SCE2016-5 pp.25-30 |
|
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-02 11:40 |
Nagasaki | Nagasaki Kinro Fukushi Kaikan | A Software-Oriented Design and Synthesis Platform for a Construction of Real-Time Systems on Programmable SoCs Takuya Hatayama, Yusuke Tani, Hideki Takase, Kazuyoshi Takagi, Naofumi Takagi (Kyoto Univ.) RECONF2015-53 |
We have been developing SWORDS platform, a SoftWare ORiented Design and Synthesis platform.SWORDS platform aims at impro... [more] | RECONF2015-53 pp.27-32 |
| RECONF | 2015-06-20 09:30 |
Kyoto | Kyoto University | A SW/HW Interface Implementation Method in the System Design Environment for Programmable SoCs Yusuke Tani, Takuya Hatayama, Hideki Takase, Kazuyoshi Takagi, Naofumi Takagi (Kyoto Univ.) RECONF2015-14 |
A programmable SoC, which integrates processors and FPGA on the same chip, has become attracted attention in embedded sy... [more] | RECONF2015-14 pp.73-78 |
| CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] | 2015-03-07 13:25 |
Kagoshima | Design and Evaluation of a Floating-point Multiplier with Online Error Detection by Partial Duplication Nobutaka Kito (Chukyo Univ.), Kazushi Akimoto, Naofumi Takagi (Kyoto Univ.) CPSY2014-181 DC2014-107 |
A floating-point multiplier with reduced precision error detection is proposed. It uses a truncated multiplier for chec... [more] |
CPSY2014-181 DC2014-107 pp.125-130 |
|
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2014-11-26 16:15 |
Oita | B-ConPlaza | An extended precision floating-point adder with 104-bit significand using two double precision floating-point adders Hiroyuki Yataka, Naofumi Takagi, Kazuyoshi Takagi (Kyoto Univ.) CPSY2014-75 |
In recent years, high speed and high precision computing is increasingly needed. Hardware support for IEEE754 compliant... [more] |
CPSY2014-75 pp.19-23 |
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