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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ICD, CPSY | 2015-12-17 16:00 |
Kyoto | Kyoto Institute of Technology | [Poster Presentation]
Performance Evaluation of Solid-State-Drives (SSDs) by Considering the effect of Error-correcting code Yusuke Yamaga, Tsukasa Tokutomi, Atsuro Kobayashi, Ken Takeuchi (Chuo Univ.)  ICD2015-71 CPSY2015-84 |
In the NAND flash memory based solid-state drives (SSDs), reliability is guaranteed by error correcting code (ECC). Conv... [more] | ICD2015-71 CPSY2015-84 p.41 |
| ICD, CPSY | 2015-12-17 16:00 |
Kyoto | Kyoto Institute of Technology | [Poster Presentation]
The Evaluation of Hybrid SSD performance Dependency on the Data Acces pattern Yusuke Sugiyama, Tomoaki Yamada, Ken Takeuchi (Chuo univ.) ICD2015-72 CPSY2015-85 |
Hybrid Solid-state drive (SSD) is comprised of NAND flash memory and storage class memory (SCM). Since the performance o... [more] | ICD2015-72 CPSY2015-85 p.43 |
| ICD, CPSY | 2015-12-17 16:00 |
Kyoto | Kyoto Institute of Technology | [Poster Presentation]
Reliability Evaluation of Privacy Protection with NAND Flash Memories Kazuki Maeda, Hiroki Yamazawa, Ken Takeuchi (Chuo Univ.) ICD2015-74 CPSY2015-87 |
Recently, Internet-data’s “Right to be forgotten” has been established for the privacy protection of personal informatio... [more] | ICD2015-74 CPSY2015-87 p.47 |
| ICD, CPSY | 2015-12-17 16:00 |
Kyoto | Kyoto Institute of Technology | [Poster Presentation]
Bit-Error Analysis in TLC NAND flash memories. Yoshiaki Deguchi, Tsukasa Tokutomi, Atsuro Kobayashi, Ken Takeuchi (Chuo Univ.) ICD2015-75 CPSY2015-88 |
The capacity of NAND flash memory can be expanded by increasing the bit density. In particular, 3-bit/cell triple-level ... [more] | ICD2015-75 CPSY2015-88 p.49 |
| ICD, CPSY | 2015-12-17 16:00 |
Kyoto | Kyoto Institute of Technology | [Poster Presentation]
Error Tendency Analysis in NAND Flash Memory Yoshio Nakamura, Tomoko Ogura Iwasaki, Ken Takeuchi (Chuo Univ.) ICD2015-76 CPSY2015-89 |
Program-disturb and data-retention degrade the reliability of NAND flash memory. During program-disturb, VTH of the memo... [more] | ICD2015-76 CPSY2015-89 p.51 |
| ICD, CPSY | 2015-12-17 16:00 |
Kyoto | Kyoto Institute of Technology | [Poster Presentation]
Error Pattern Analysis of Long-Term Storage with NAND Flash Memory Tomonori Takahashi, Senju Yamazaki, Ken Takeuchi (Chuo Univ.) ICD2015-77 CPSY2015-90 |
NAND flash memory has advantages of fast access speed and high density compared with other storage devices such as hard ... [more] | ICD2015-77 CPSY2015-90 p.53 |
| SDM | 2015-10-29 16:30 |
Miyagi | Niche, Tohoku Univ. | [Invited Talk]
Low-power and high-speed FPGA by adjacent integration of flash memory and CMOS logic Koichiro Zaitsu, Kosuke Tatsumura, Mari Matsumoto, Masato Oda, Shinichi Yasuda (Toshiba) SDM2015-75 |
Novel nonvolatile programmable switch for low-power and high-speed FPGA where flash memory is adjacently integrated to C... [more] | SDM2015-75 pp.23-28 |
| CPSY, DC, IPSJ-ARC (Joint) [detail] |
2015-08-06 14:30 |
Oita | B-Con Plaza (Beppu) | Performance tuning methods for out-of-core stencil computations with flash SSDs Hiroko Midorikawa, Hideyuki Tan (Seikei Univ.) CPSY2015-41 |
This report proposes several performance tuning methods to use flash SSDs as an extension to main memory. It also invest... [more] | CPSY2015-41 pp.241-246 |
| IT | 2015-07-14 11:20 |
Tokyo | Tokyo Institute of Technology | Maximization of Number of Rewritings for Index-less Indexed Flash Codes with Bits for Reversal Akira Yamawaki (Gifu Univ.), Hironori Uchikawa (Toshiba), Hiroshi Kamabe (Gifu Univ.) IT2015-32 |
The index-less indexed flash code(ILIFC) with bits for reversal is a variant of a coding scheme proposed by Mahdavifar e... [more] | IT2015-32 pp.89-94 |
| ICD | 2015-04-16 14:25 |
Nagano | [Invited Talk]
A 28nm Embedded SG-MONOS Flash Macro for Automotive Achieving 200MHz Read Operation and 2.0MB/s Write Throughput at Tj of 170℃ Makoto Muneyasu, Yasuhiko Taito, Masaya Nakano, Takashi Ito, Takashi Kono, Kenji Noguchi, Hideto Hidaka, Tadaaki Yamauchi (Renesas) ICD2015-4 |
First-ever 28nm embedded SG-MONOS flash macros are presented to realize aggressive device scaling with improved reliabil... [more] | ICD2015-4 pp.15-19 |
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| ICD, CPSY | 2014-12-01 15:15 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Poster Presentation]
A High-Performance Solid-State Drives with LBA Scrambler Tomoaki Yamada, Chao Sun, Ken Takeuchi (Chuo Univ.) ICD2014-87 CPSY2014-99 |
In the NAND flash memory based Solid-state drives (SSDs), since in-place overwrite is prohibited in NAND flash, the oper... [more] | ICD2014-87 CPSY2014-99 p.53 |
| ICD, CPSY | 2014-12-01 15:15 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Poster Presentation]
Performance Analysis of the Hybrid SSDs in Consideration of Error-correcting code Hirofumi Takishita, Shuhei Tanakamaru, Takahiro Onagi, Ken Takeuchi (Chuo Univ) ICD2014-88 CPSY2014-100 |
The performance of SSDs is guaranteed by error-correcting code (ECC). The longer parity size of ECC is, the higher error... [more] | ICD2014-88 CPSY2014-100 p.55 |
| CPSY | 2014-10-10 13:25 |
Chiba | Meeting Room 303, International Conference Hall, Makuhari-Messe | Theoretical Write Amplification Analysis of the SSD Shin-ichi Kanno, Hiroshi Yao (TOSHIBA), Daisuke Hashimoto (TAEC) CPSY2014-51 |
Theoretical limitation of write amplification and write speed of solid state drives (SSDs) are affected by page size and... [more] | CPSY2014-51 pp.25-30 |
| ICD, SDM | 2014-08-05 11:15 |
Hokkaido | Hokkaido Univ., Multimedia Education Bldg. | [Invited Talk]
Low-Power and High-Speed Nonvolatile FPGA by Adjacent Integration of MONOS/Logic and Novel Programming Scheme Koichiro Zaitsu, Kosuke Tatsumura, Mari Matsumoto, Masato Oda, Shinobu Fujita, Shinichi Yasuda (Toshiba) SDM2014-75 ICD2014-44 |
Novel nonvolatile programmable switch for low-power and high-speed FPGA where MONOS flash is adjacently integrated to CM... [more] | SDM2014-75 ICD2014-44 pp.71-76 |
| IT | 2014-07-17 15:50 |
Hyogo | Kobe University | A Flash Code Utilizing Dynamic Segment Allocation Kazuki Kumagai, Yuichi Kaji (NAIST) IT2014-22 |
A novel flash code is proposed, and shown to have good average-case performance through computer simulation. The propo... [more] |
IT2014-22 pp.59-64 |
| SDM | 2014-06-19 11:45 |
Aichi | VBL, Nagoya Univ. | Characteristics of charge trap flash memory with Al2O3/(Ta/Nb)Ox/Al2O3 multi-layer by ALD method Toshihide Nabatame, Akihiko Ohi (NIMS), Kazuhiro Ito, Makoto Takahashi (Osaka Univ.), Toyohiro Chikyow (NIMS) SDM2014-49 |
We studied characteristics of the p-Si/SiO2/Al2O3-TL/(Ta/Nb)Ox-CTL/Al2O3-BL/Pt capacitors, fabricated by using ALD at 20... [more] | SDM2014-49 pp.31-35 |
| ICD | 2014-04-17 10:20 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
66.3KIOPS-Random-Read 690MB/s-Sequential-Read Universal Flash Storage Device Controller with Unified Memory Extension Kenichiro Yoshii, Konosuke Watanabe, Nobuhiro Kondo, Kenichi Maeda, Toshio Fujisawa, Junji Wadatsumi, Daisuke Miyashita, Shouhei Kousai, Yasuo Unekawa, Shinsuke Fujii, Takuma Aoyama, Takayuki Tamura, Atsushi Kunimatsu, Yukihito Oowaki (Toshiba) ICD2014-2 |
The world’s first embedded NAND storage device controller with Unified Memory (UM) has been demonstrated. UM achieves 2 ... [more] | ICD2014-2 pp.3-8 |
| ICD | 2014-04-17 12:10 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Design of Exchangeable MLC/TLC Hybrid Storage Array for Big Data Shogo Hachiya, Koh Johguchi (Chuo Univ.), Kousuke Miyaji (Shinshu Univ.), Ken Takeuchi (Chuo Univ.) ICD2014-5 |
A TLC-NAND flash provides a low cost and high capacity memory solution. However the reliability and access latency of TL... [more] | ICD2014-5 pp.21-26 |
| ICD | 2014-04-17 15:50 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Panel Discussion]
Perspective of emerging memories in systems and systems on emerging memories Toru Miwa (SanDisk), Koji Nii (Renesas), Shinobu Fujita (Toshiba), Hiroki Koike (Tohoku Univ.), Ken Takeuchi (Chuo Univ.) ICD2014-9 |
(To be available after the conference date) [more] | ICD2014-9 p.45 |
| ISEC, IT, WBS | 2014-03-10 11:00 |
Aichi | Nagoya Univ., Higashiyama Campus | Classification of Partitions of Permutations by Dominant Sets for Rank Modulation Yusuke Takahashi, Hiroshi Kamabe (Gifu Univ.) IT2013-56 ISEC2013-85 WBS2013-45 |
A coing scheme using a rank modulation was proposed for storing data in flash memories.There are two fundamental operati... [more] | IT2013-56 ISEC2013-85 WBS2013-45 pp.13-18 |
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