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Technical Committee on Integrated Circuits and Devices (ICD) (Searched in: 2010)
Search Results: Keywords 'from:2010-12-16 to:2010-12-16'
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ICD | 2010-12-16 15:10 |
Tokyo | RCAST, Univ. of Tokyo | [Poster Presentation]
Design of An FU Network for Array Accelerators Suguru Ooue, Takuya Iwakami, Kazuhiro Yoshimura, Takashi Nakada, Yasuhiko Nakashima (NAIST)  ICD2010-115 |
We have proposed Linear Array Pipeline Processor (LAPP) as a special implementation of Function Unit (FU) array based ac... [more] | ICD2010-115 pp.97-99 |
| ICD | 2010-12-16 15:10 |
Tokyo | RCAST, Univ. of Tokyo | [Poster Presentation]
On-chip immunoassay by a standard CMOS chip Jaesung Lee (Hiroshima Univ.), Koh Johguchi (Univ. of Tokyo), Fumie Kaneko (Astellas), Tomohiro Ishikawa (Hiroshima Univ.) ICD2010-116 |
Aiming an immunoassay application, a standard CMOS chip which actuates dispersed magnetic beads was designed and fabrica... [more] | ICD2010-116 pp.101-105 |
| ICD | 2010-12-17 09:30 |
Tokyo | RCAST, Univ. of Tokyo | [Invited Talk]
Time Difference Amplifier, from Getting Idea to Presenting at a Conference Toru Nakura (Univ. of Tokyo) ICD2010-117 |
[more] | ICD2010-117 pp.107-111 |
| ICD | 2010-12-17 10:20 |
Tokyo | RCAST, Univ. of Tokyo | Low Power and Highly Reliable Ferroelectric (Fe)-NAND Flash Memory for Enterprise SSD Teruyoshi Hatanaka, Ryoji Yajima, Shinji Noda (Univ. of Tokyo), Mitsue Takahashi, Shigeki Sakai (AIST), Ken Takeuchi (Univ. of Tokyo) ICD2010-118 |
This paper proposes the techniques for highly reliable ferroelectric(Fe)-NAND flash memory. Fe-NAND has the low program/... [more] | ICD2010-118 pp.113-118 |
| ICD | 2010-12-17 10:55 |
Tokyo | RCAST, Univ. of Tokyo | Development of Procedure for Modeling MOSFET Compatible with ITRS
-- Noise and I-V Characteristics Modeling for RF/Analog MOSFET -- Sin-Nyoung Kim, Akira Tsuchiya, Hidetoshi Onodera (Kyoto Univ.) ICD2010-119 |
A procedure for modeling MOSFET compatible with ITRS is proposed. Compared to the PTM, this work focuses on how to gener... [more] | ICD2010-119 pp.119-123 |
| ICD | 2010-12-17 11:20 |
Tokyo | RCAST, Univ. of Tokyo | A Charge-Domain Auto- and Cross-Correlation Based IR-UWB Receiver with Power- and Area-efficient PLL for 62.5ps Step Data Synchronization in 65nm CMOS Lechang Liu, Takayasu Sakurai, Makoto Takamiya (Univ. of Tokyo) ICD2010-120 |
A 100Mb/s, 1.71mW DC-960MHz band impulse radio ultra-wideband (IR-UWB) receiver is developed in 1.2V 65nm CMOS. A novel ... [more] | ICD2010-120 pp.125-129 |
| ICD | 2010-12-17 13:00 |
Tokyo | RCAST, Univ. of Tokyo | [Invited Talk]
Variability in Scaled MOS Devices Kiyoshi Takeuchi (Renesas) ICD2010-121 |
[more] | ICD2010-121 pp.131-133 |
| ICD | 2010-12-17 13:50 |
Tokyo | RCAST, Univ. of Tokyo | Misleading Energy and Performance Claims in Sub/Near Threshold Digital Systems Yu Pu, Xin Zhang, Jim Huang (Univ. of Tokyo), Atsushi Muramatsu, Masahiro Nomura, Koji Hirairi, Hidehiro Takata, Taro Sakurabayashi, Shinji Miyano (STARC), Makoto Takamiya, Takayasu Sakurai (Univ. of Tokyo) ICD2010-122 |
Many of us in the field of ultra-low-Vdd processors experience difficulty in assessing the sub/near threshold circuit te... [more] | ICD2010-122 pp.135-140 |
| ICD | 2010-12-17 14:15 |
Tokyo | RCAST, Univ. of Tokyo | Fine Grained Time Sharing to Extend Capacity of FU Array Takuya Iwakami, Kazuhiro Yoshimura, Kodai Mori, Takashi Nakada, Yasuhiko Nakashima (NAIST) ICD2010-123 |
We have proposed Linear Array Pipeline Processor (LAPP) which can map popular VLIW codes onto FU array and execute them... [more] |
ICD2010-123 pp.141-146 |
| ICD | 2010-12-17 14:50 |
Tokyo | RCAST, Univ. of Tokyo | Comparison of the Error Correction Methods for SSDs and Dynamic Codeword Transition ECC Scheme Shuhei Tanakamaru (Univ. of Tokyo), Atsushi Esumi, Mitsuyoshi Ito, Kai Li (SIGLEAD), Ken Takeuchi (Univ. of Tokyo) ICD2010-124 |
This paper compares error correcting codes (ECC) such as RS code and BCH code as an ECC for SSDs and introduces dynamic ... [more] | ICD2010-124 pp.147-152 |
| ICD | 2010-12-17 15:15 |
Tokyo | RCAST, Univ. of Tokyo | A Circuit Partitioning Strategy for 3-D Integrated Multipliers Kazuhito Sakai, Jubee Tada (Yamagata Univ.), Ryusuke Egawa, Hiroaki Kobayashi (Tohoku Univ.), Gensuke Goto (Yamagata Univ.) ICD2010-125 |
Three-dimensional(3-D) integration technologies attract a lot of attention to further enhance the performance of the LSI... [more] | ICD2010-125 pp.153-158 |
| ICD | 2010-12-17 15:40 |
Tokyo | RCAST, Univ. of Tokyo | Design of a Low Error LUT-based Truncated Multiplier Van-Phuc Hoang, Cong-Kha Pham (Univ. of Electro-comm.) ICD2010-126 |
Truncated multiplication is an efficient method to reduce area and power consumption of multipliers in signal processing... [more] | ICD2010-126 pp.159-162 |
| ICD | 2010-12-17 16:15 |
Tokyo | RCAST, Univ. of Tokyo | A 1-V Input, 0.2-V to 0.47-V Output Switched-Capacitor DC-DC Converter with Pulse Density and Width Modulation (PDWM) for 57% Ripple Reduction Xin Zhang, Yu Pu, Koichi Ishida (Univ. of Tokyo), Yoshikatsu Ryu, Yasuyuki Okuma (STARC), Po-Hung Chen (Univ. of Tokyo), Kazunori Watanabe (STARC), Takayasu Sakurai, Makoto Takamiya (Univ. of Tokyo) ICD2010-127 |
To effectively reduce output ripple of switched-capacitor DC-DC converters which generate variable output voltages, a no... [more] | ICD2010-127 pp.163-167 |
| ICD | 2010-12-17 16:40 |
Tokyo | RCAST, Univ. of Tokyo | 0.18-V Input Charge Pump with Forward Body Biasing in Startup Circuit using 65nm CMOS Po-Hung Chen, Koichi Ishida, Xin Zhang (Tokyo Univ.), Yasuyuki Okuma, Yoshikatsu Ryu (STARC), Makoto Takamiya, Takayasu Sakurai (Tokyo Univ.) ICD2010-128 |
In this paper, a 0.18-V input three-stage charge pump circuit applying forward body bias is proposed. In the developed c... [more] | ICD2010-128 pp.169-173 |
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