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Technical Committee on Integrated Circuits and Devices (ICD) (Searched in: 2007)

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Search Results: Conference Papers

Conference Papers (Available on Advance Programs) (Sort by: Date Ascending)

Committee	Date Time	Place		Paper Title / Authors	Abstract	Paper #
ICD	2007-04-12 09:00	Oita		MRAM Cell Technology for High-speed SoCs Noboru Sakimura, Tadahiko Sugibayashi, Ryusuke Nebashi, Hiroaki Honjo, Kenichi Shimura, Naoki Kasai (NEC) ICD2007-1	We has succeeded in developing new MRAM cell technology suitable for high-speed memory macro embedded in next generation... [more]	ICD2007-1 pp.1-5
ICD	2007-04-12 09:30	Oita		Design of Low Read Bias Voltage and High Speed Sense Amplifier for STT-MRAM Yoshihiro Ueda, Yoshihisa Iwata, Tsuneo Inaba, Yuui Shimizu, Kiyotaro Itagaki, Kenji Tsuchida (Toshiba) ICD2007-2	(To be available after the conference date) [more]	ICD2007-2 pp.7-12
ICD	2007-04-12 10:00	Oita		A high-density 1T-4MTJ MRAM with Self-Reference Sensing Scheme Yasumitsu Murai, Hiroaki Tanizaki (Renesas Design), Takaharu Tsuji, Jun Otani, Yuichiro Yamaguchi, Haruo Furuta, Shuichi Ueno, Tsukasa Oishi, Masanori Hayashikoshi, Hideto Hidaka (Renesas) ICD2007-3	A high-density memory cell named 1-Transistor 4-Magnetic Tunnel Junction (1T-4MTJ) has been proposed for Magnetic Random... [more]	ICD2007-3 pp.13-16
ICD	2007-04-12 10:40	Oita		Device Technology for embedded DRAM utilizing stacked MIM(Metal-Insulator-Metal) Capacitor Takaho Tanigawa, Yasushi Yamagata, Hiroki Shirai, Hirotoshi Sugimura, Tomoko Wake, Ken Inoue, Takashi Sakoh, Masato Sakao (NECEL) ICD2007-4	This paper presents embedded DRAM device technology utilizing stacked MIM(Metal-Insulator-Metal) capacitor. Targeted for... [more]	ICD2007-4 pp.17-22
ICD	2007-04-12 11:10	Oita		[Invited Talk] A 512kB Embedded Phase Change Memory with 416kB/s Write Throughput at 100μA Cell Write Current Akira Kotabe, Satoru Hanzawa (Hitachi), Naoki Kitai (Hitachi ULSI), Kenichi Osada, Yuichi Matsui, Nozomu Matsuzaki, Norikatsu Takaura (Hitachi), Masahiro Moniwa (Renesas), Takayuki Kawahara (Hitachi) ICD2007-5	An experimental 512-kB embedded Phase Change Memory (PCM) is developed in a 0.13-μm 1.5-V CMOS technology. Three circuit... [more]	ICD2007-5 pp.23-28
ICD	2007-04-12 13:00	Oita		[Invited Talk] 2-Mb SPRAM (SPin-transfer torque RAM) with Bit-by-bit Bi-Directional Current Write and Parallelizing-Direction Current Read Riichiro Takemura, Takayuki Kawahara, Katsuya Miura (Hitachi), Jun Hayakawa (Hitachi/Tohoku Univ.), Shoji Ikeda, Young Min LEE, Ryutaro Sasaki (Tohoku Univ.), Yasushi Goto, Kenchi Ito (Hitachi), Toshiyasu Meguro, Fumihiro Matsukura (Tohoku Univ.), Hiromasa Takahashi (Hitachi/Tohoku Univ.), Hideyuki Matsuoka (Hitachi), Hideo Ohno (Tohoku Univ.) ICD2007-6	A 1.8-V 2-Mb SPRAM (SPin-transfer torque RAM) chip using 0.2 µm logic process with MgO tunneling barrier cell demo... [more]	ICD2007-6 pp.29-34
ICD	2007-04-12 13:50	Oita		A Novel Two-Port SRAM for Low Bitline Power Using Majority Logic and Data-Bit Reordering Hidehiro Fujiwara, Koji Nii, Hiroki Noguchi, Junichi Miyakoshi, Yuichiro Murachi, Yasuhiro Morita, Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.) ICD2007-7	[more]	ICD2007-7 pp.35-40
ICD	2007-04-12 14:20	Oita		A voltage scalable advanced DFM RAM with accelerated screening for low power SoC platform Hiroki Shimano, Fukashi Morishita, Katsumi Dosaka, Kazutami Arimoto (Renesas Technology Corp.) ICD2007-8	The advanced-DFM (Design For Manufacturability) RAM provides the solution for the limitation of SRAM voltage scaling dow... [more]	ICD2007-8 pp.41-46
ICD	2007-04-12 14:50	Oita		High-speed Operation SRAM cell using Bulk-type Thyristor Taro Sugizaki, Motoaki Nakamura, Masashi Yanagita, Motonari Honda, Mitsuko Shinohara, Tetsuya Ikuta, Tomokazu Ohchi, Katsuhisa Kugimiya, Ryo Yamamoto, Saori Kanda, Ikuhiro Yamamura, Kojiro Yagami, Tatsuji Oda (Sony corp.) ICD2007-9	We have successfully developed an alternative SRAM cell using Bulk Thyristor-RAM (BT-RAM) for the first time. BT-RAM, fo... [more]	ICD2007-9 pp.47-52
ICD	2007-04-12 15:30	Oita		[Panel Discussion] * Masahiko Yoshimoto (Kobe Univ.)	[more]
ICD	2007-04-13 09:10	Oita		Floating Body RAM Technology and its Scalability to 32nm Node Hiroomi Nakajima, Naoki Kusunoki, Tomoaki Shino (Toshiba), Tomoki Higashi (TOSMEC), Takashi Ohsawa, Katsuyuki Fujita, Nobuyuki Ikumi, Fumiyoshi Matsuoka, Ryo Fukuda, Yohji Watanabe, Yoshihiro Minami (Toshiba), Atsushi Sakamoto (TJ), Jun Nishimura, Takeshi Hamamoto, Akihiro Nitayama (Toshiba) ICD2007-10	Technologies and improved performance of the Floating Body RAM are demonstrated. Reducing SOI thickness to 43nm, a 16Mb ... [more]	ICD2007-10 pp.53-58
ICD	2007-04-13 09:40	Oita		[Invited Talk] A 65 nm Embedded SRAM with Wafer Level Burn-In Mode, Leak-Bit Redundancy and E-trim Fuse for Known Good Die Shigeki Ohbayashi, Makoto Yabuuchi, Kazushi Kono (Renesas Technology), Yuji Oda (Shikino High-Tech), Susumu Imaoka (Renesas Design), Keiichi Usui (Daioh Electric), Toshiaki Yonezu, Takeshi Iwamoto, Koji Nii, Yasumasa Tsukamoto, Masashi Arakawa, Takahiro Uchida, Hiroshi Makino, Koichiro Ishibashi, Hirofumi Shinohara (Renesas Technology) ICD2007-11	We propose a Wafer Level Burn-In (WLBI) mode, a leak-bit redundancy and a small, highly reliable Cu E-trim fuse repair s... [more]	ICD2007-11 pp.59-64
ICD	2007-04-13 10:30	Oita		A 0.14pJ/b Inductive-Coupling Transceiver Noriyuki Miura, Hiroki Ishikuro (Keio Univ.), Takayasu Sakurai (Univ. of Tokyo), Tadahiro Kuroda (Keio Univ.) ICD2007-12	A 0.14pJ/b inter-chip inductive-coupling data transceiver is developed. By using a pulse-shaping circuit, the transmitte... [more]	ICD2007-12 pp.65-69
ICD	2007-04-13 11:00	Oita		[Invited Talk] A high density embedded memory for Soc: Twin transistor RAM(TT-RAM) Kazutami Arimoto, Fukashi Morishita, Isamu Hayashi, Katsumi Dosaka (Renesas) ICD2007-13	A high speed/low power dissipation high density Twin transistor RAM(TT-RAM) has been developed as SOI CMOS platform memo... [more]	ICD2007-13 pp.71-76
ICD	2007-04-13 13:00	Oita		[Invited Talk] High Speed Unipolar Switching Resistance RAM (RRAM) Technology Yasunari Hosoi, Yukio Tamai, T. Ohnishi, K. Ishihara, T. Shibuya, Y. Inoue, S. Yamazaki, T.Nakano, Shigeo Ohnishi, Nobuyoshi Awaya (Sharp), I. H. Inoue, Hisashi Shima (AIST(NEDO)), Hiroyuki Akinaga, Hidenori Takagi, Hiroshi Akoh (AIST(CERC)) ICD2007-14	We have successfully achieved high speed (~50 ns) unipolar operation in RRAM devices comprised of titanium oxynitride (T... [more]	ICD2007-14 pp.77-82
ICD	2007-04-13 13:50	Oita		Suppression of lateral charge redistribution using advanced impurity trap memory for improving high temperature retention Hiroshi Sunamura, Taeko Ikarashi, Ayuka Morioka, Setsu Kotsuji, Makiko Oshida, Nobuyuki Ikarashi, Shinji Fujieda, Hirohito Watanabe (NEC) ICD2007-15	For retention improvement in scaled SONOS-type non-volatile memory, deep traps with controllable density were formed by ... [more]	ICD2007-15 pp.83-88
ICD	2007-04-13 14:20	Oita		25nm SONOS-type Memory Device usinh Double Tunnel Junction Ryuji Ohba, Yuichiro Mitani, Naoharu Sugiyama, Shinobu Fujita (Toshiba Co.) ICD2007-16	When a nano meter scale conductive island is lying between two tunnel resistance, this structure is called "Double junct... [more]	ICD2007-16 pp.89-93
ICD, IPSJ-ARC	2007-05-31 10:30	Kanagawa		Promotion of drowsy cache efficiency Keni-chiro Ishikawa (Keio Univ.)	Improvement of drowsy cache which is technique of low power consumption in cache memory is proposed in this paper. Cache... [more]	ICD2007-17 pp.1-6
ICD, IPSJ-ARC	2007-05-31 11:00	Kanagawa		A Study on Control Scheme of Awake Time in Drowsy Caches Ryotaro Kobayashi, Hideki Taniguchi, Toshio Shimada (Nagoya Univ.)	Recently static power due to the leakage current has been a major problem as process technology advances. Drowsy Cache ... [more]	ICD2007-18 pp.7-12
ICD, IPSJ-ARC	2007-05-31 11:30	Kanagawa		The Potential of Temperature-Aware Configurable Cache on Energy Reduction Hamid Noori, Maziar Goudarzi, Koji Inoue, Kazuaki Murakami (Kyushu Univ.)	Active power used to be the primary contributor to total power dissipation of CMOS designs, but with the technology sca... [more]	ICD2007-19 pp.13-18
ICD, IPSJ-ARC	2007-05-31 13:15	Kanagawa		Effect of Data Prefetching on Chip MultiProcessor Naoto Fukumoto, Tomonobu Mihara, Koji Inoue, Kazuaki Murakami (Kyushu Univ.)	Chip MultiProcessors (or CMPs) can achieve higher performance by means of exploiting thread level parallelism. Increasin... [more]	ICD2007-20 pp.19-24
ICD, IPSJ-ARC	2007-05-31 13:45	Kanagawa		Mutligrain Parallel Processing in SMP Execution Mode on a Multicore for Consumer Electronics Masayoshi Mase, Daisuke Baba, Harumi Nagayama, Hiroaki Tano, Takeshi Masuura, Takamichi Miyamoto, Jun Shirako, Hirofumi Nakano, Keiji Kimura (Waseda Univ.), Tatsuya Kamei, Toshihiro Hattori, Atsushi Hasegawa (Renesas Technology), Masaki Ito, Makoto Satoh, Kunio Uchiyama (Hitachi Ltd.)	Currently, multicore processors are becoming ubiquitous in various computing domains, namely con- sumer electronics suc... [more]	ICD2007-21 pp.25-30
ICD, IPSJ-ARC	2007-05-31 14:15	Kanagawa		A 4320MIPS Four-Processor Core SMP/AMP with Individually Managed Clock Frequency for Low Power Consumption Kiyoshi Hayase, Yutaka Yoshida, Tatsuya Kamei, Shinichi Shibahara, Osamu Nishii, Toshihiro Hattori, Atsushi Hasegawa (Renesas technology), Masashi Takada, Naohiko Irie, Kunio Uchiyama, Toshihiko Odaka (Hitachi Ltd.), Kiwamu Takada (Hitachi ULSI Systems Co. Ltd.), Keiji Kimura, Hironori Kasahara (Waseda Univ.) ICD2007-22	4320MIPS 4-processor SoC that provides with low power consumption and high performance was designed using 90nm process. ... [more]	ICD2007-22 pp.31-35
ICD, IPSJ-ARC	2007-05-31 15:00	Kanagawa		[Invited Talk] The challenge of continually increasing computer power Aiichiro Inoue (Fujitsu)	In accordance with Moore’s Law, CPU performance has enjoyed a steady 2x performance increase every 1.5 years; this has l... [more]	ICD2007-23 pp.37-42
ICD, IPSJ-ARC	2007-05-31 16:15	Kanagawa		Improving Energy-efficiency of Canary-based DVS system Toshinori Sato (Kyushu Univ), Yuji Kunitake (Kyushu Inst Tech)	In deep submicron technologies, parameter variations have become a serious problem on LSI design. We proposed canary fli... [more]	ICD2007-24 pp.43-48
ICD, IPSJ-ARC	2007-05-31 16:45	Kanagawa		A fine grain dynamic sleep control scheme in MIPS R3000 Naomi Seki, Yohei Hasegawa, Hideharu Amano (Keio Univ.), Naoaki Ohkubo, Seidai Takeda, Toshihiro Kashima, Toshiaki Shirai, Kimiyoshi Usami (Shibaura Inst. Tech.), Masaaki Kondo, Hiroshi Nakamura (U. of Tokyo)	[more]	ICD2007-25 pp.49-54
ICD, IPSJ-ARC	2007-05-31 17:15	Kanagawa		A high-throughput, low-power FFT circuits for OFDM based wireless communication systems Shinsuke Ushiki, Kazunori Shimizu, Koichi Nakamura, Satoshi Goto, Takeshi Ikenaga (Waseda Univ.) ICD2007-26	OFDM attracts attention in digital wireless communication systems. In the FFT circuit which is main processing of digita... [more]	ICD2007-26 pp.55-60
ICD, IPSJ-ARC	2007-06-01 10:30	Kanagawa		Fast, Accurate Cache Simulation Takatsugu Ono, Koji Inoue, Kazuaki Murakami (Kyushu Univ.)	[more]	ICD2007-27 pp.61-66
ICD, IPSJ-ARC	2007-06-01 11:00	Kanagawa		Design Techniques of Wave Pipelines Masa-aki Fukase, Tomoaki Sato (Hirosaki Univ.) ICD2007-28	In order to improve rather complicated design and testing methods of wave-pipelines, our policy is to cover rough tuning... [more]	ICD2007-28 pp.67-72
ICD, IPSJ-ARC	2007-06-01 11:30	Kanagawa		Evaluation of "Write Assurance Buffer" for Dynamic Timing-error Detection Hidetsugu Irie (JST), Ken Sugimoto, Masahiro Goshima, Shuichi Sakai (Univ. of Tokyo)	[more]	ICD2007-29 pp.73-78
ICD, IPSJ-ARC	2007-06-01 13:15	Kanagawa		The Concept of Innovative Power Control for Ultra Low-Power and High-Performance System LSIs Hiroshi Nakamura (Univ. of Tokyo), Hideharu Amano (Keio Univ.), Kimiyoshi Usami (Shibaura Inst. Tech.), Mitaro Namiki (TUAT), Masashi Imai, Masaaki Kondo (Univ. of Tokyo)	[more]	ICD2007-30 pp.79-84
ICD, IPSJ-ARC	2007-06-01 13:45	Kanagawa		GA-Based Assignment of Supply and Threshold Voltages and Interconnection Simplification for Low Power VLSI Design Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama (Tohoku Univ.) ICD2007-31	This paper presents a method to minimize the total energy consumption under time and area constraints, considering inter... [more]	ICD2007-31 pp.85-90
ICD, IPSJ-ARC	2007-06-01 14:15	Kanagawa		The Dynamic Instruction Scheduler for ALU Cascading Kosuke Ogata, Jun Yao, Shinobu Miwa, Hajime Shimada, Shinji Tomita (Kyoto Univ.)	[more]	ICD2007-32 pp.91-96
ICD, IPSJ-ARC	2007-06-01 15:00	Kanagawa		[Invited Talk] Architecture of the Highly Parallel Array Processor IMAPCAR and its technology perspective Shorin Kyo (NEC)	[more]	ICD2007-33 pp.97-102
ICD, IPSJ-ARC	2007-06-01 16:15	Kanagawa		Design of a highly parallel VLSI processor based on functional-unit-level packet data transfer scheme Yoshichika Fujioka, Nobuhiro Tomabechi (Hachinohe Inst. Tech.), Michitaka Kameyama (Tohoku Univ.) ICD2007-34	Until now, network on chip technology based on course grain packet data transfer was proposed. In this paper, fine grain... [more]	ICD2007-34 pp.103-108
ICD, IPSJ-ARC	2007-06-01 16:45	Kanagawa		Crossbar-Connected Multi-Layer Topologies for 3-D Network-on-Chips Hiroki Matsutani (Keio Univ.), Michihiro Koibuchi (NII), Hideharu Amano (Keio Univ.)	[more]	ICD2007-35 pp.109-114
ICD, IPSJ-ARC	2007-06-01 17:15	Kanagawa		On-chip Network Architecture for Large Scale Reconfigurable Datapath Keita Shimasaki, Takaaki Nagano, Hiroaki Honda, Farhad Mehdipour, Koji Inoue, Kazuaki Murakami (Kyushu Univ.) ICD2007-36	[more]	ICD2007-36 pp.115-120
ICD, ITE-IST	2007-07-26 08:30	Hyogo		Analog Memory Circuit using Data Holding Unit Tomochika Harada, Suguru Yamada, Sumio Okuyama, Koichi Matsushita (Yamagata Univ.) ICD2007-37	[more]	ICD2007-37 pp.1-4
ICD, ITE-IST	2007-07-26 08:55	Hyogo		CMOS voltage reference based on threshold voltage of a MOSFET Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya (Hokkaido Univ.) ICD2007-38	We developed a voltage reference circuit using MOSFETs operated in the subthreshold region, except for the MOS resistor ... [more]	ICD2007-38 pp.5-10
ICD, ITE-IST	2007-07-26 09:20	Hyogo		A Trimming-Free CMOS Bandgap-Reference Circuit with Sub-1-V-Supply Voltage Operation Yuichi Okuda, Takayuki Tsukamoto, Mitsuru Hiraki, Masashi Horiguchi, Takayasu Ito (Renesas) ICD2007-39	We propose a bandgap-reference circuit (BGR) that is very robust against voltage, temperature, and local device variatio... [more]	ICD2007-39 pp.11-15
ICD, ITE-IST	2007-07-26 09:45	Hyogo		On-Die Supply-Voltage Noise Sensor with Real-Time Sampling Mode for Low-Power Processor Applications Tomio Sato, Atsuki Inoue, Tetsuyoshi Shiota, Tomoko Inoue, Yukihito Kawabe, Tetsutaro Hashimoto (Fujitsu Lab.), Toshifumi Imamura, Yoshitaka Murasaka, Makoto Nagata, Atsushi Iwata (A-R-Tec) ICD2007-40	The real time on-die noise sensor reported here can continuously detect up to 100 noise events per a second without dist... [more]	ICD2007-40 pp.17-22
ICD, ITE-IST	2007-07-26 10:20	Hyogo		A Design of CMOS Low Noise Amplifier for a Neural Signal Sensing LSI Ryoji Eki, Takeshi Yoshida, Atsushi Iwata, Masayuki Yoshida, Kazumasa Uematsu (Hirosima Univ.) ICD2007-41	The realization of neural signal sensing LSIs is demanded in the field of physiology and biology in order to observe a r... [more]	ICD2007-41 pp.23-28
ICD, ITE-IST	2007-07-26 10:45	Hyogo		A 6-bit 3.5GS/s 0.9-V 98-mW Flash ADC in 90nm CMOS Kazuaki Deguchi, Naoko Suwa, Masao Ito, Toshio Kumamoto, Takahiro Miki (Renesas Technology) ICD2007-42	A 6-bit 3.5-GS/s flash ADC is fabricated in a 90nm CMOS process. A clamp diode with a replica biasing and an acceleratio... [more]	ICD2007-42 pp.29-34
ICD, ITE-IST	2007-07-26 11:10	Hyogo		The Effects of Switch Resistances on Pipelined ADC Performances and the Optimization for the Settling Time Masaya Miyahara, Akira Matsuzawa (Tokyo Tech.) ICD2007-43	In this paper, we discuss the effects of switch resistances on the step response of switched-capacitor circuits, especia... [more]	ICD2007-43 pp.35-40
ICD, ITE-IST	2007-07-26 11:35	Hyogo		A 14b Low-power Pipeline A/D Converter Using a Pre-charging Technique Kazutaka Honda, Zheng Liu, Masanori Furuta, Shoji Kawahito (Shizuoka Univ.) ICD2007-44	This paper presents a low-power pipeline A/D converter (ADC) using a novel pre-charged multiplying digital-to-analog con... [more]	ICD2007-44 pp.41-46
ICD, ITE-IST	2007-07-26 13:00	Hyogo		[Invited Talk] * Masayuki Hirafuji (NARO) ICD2007-45	Sensor networks contribute global environment monitoring, massive bio-mass production for bio-energy resource, surveilla... [more]	ICD2007-45 pp.47-51
ICD, ITE-IST	2007-07-26 13:50	Hyogo		[Invited Talk] * Masateru Minami (Shibaura Institute of Technology) ICD2007-46	[more]	ICD2007-46 pp.53-58
ICD, ITE-IST	2007-07-26 14:50	Hyogo		1-cc Sensor-node: Cross-Layer Integration with 3.4-nW/bps Link and 22-cm Locationing Goichi Ono, Tatsuo Nakagawa, Ryosuke Fujiwara, Takayasu Norimatsu, Takahide Terada, Masayuki Miyazaki, Kei Suzuki, Kazuo Yano (Hitachi/ＹＲＰ), Yuji Ogata, Akira Maeki (YRP), Shinsuke Kobayashi, Noboru Koshizuka, Ken Sakamura (YRP/Univ. of Tokyo) ICD2007-47	On sensor-network technology, miniaturization, long battery life and location with high accuracy are required for a sens... [more]	ICD2007-47 pp.59-63
ICD, ITE-IST	2007-07-26 15:15	Hyogo		A CMOS UWB-IR Receiver Analog Front End with Intermittent Operation Takahide Terada, Ryosuke Fujiwara, Goichi Ono, Takayasu Norimatsu, Tatsuo Nakagawa, Kenichi Mizugaki, Masayuki Miyazaki (Hitachi/YRP), Kei Suzuki, Kazuo Yano (Hitachi, Ltd., CRL), Akira Maeki, Yuji Ogata (YRP), Shinsuke Kobayashi, Noboru Koshizuka, Ken Sakamura (YRP/Univ. of Tokyo) ICD2007-48	(To be available after the conference date) [more]	ICD2007-48 pp.65-70
ICD, ITE-IST	2007-07-26 15:40	Hyogo		Cross-Layer Design for Low-Power Wireless Sensor Node using Long-Wave Standard Time Code Yu Otake, Masumi Ichien, Takashi Takeuchi, Akihiro Gion, Shinji Mikami, Hidehiro Fujiwara, Hiroshi Kawaguchi, Chikara Ohta, Masahiko Yoshimoto (Kobe Univ.) ICD2007-49	We propose Isochronous-MAC (I-MAC) using the Long-Wave Standard Time Code, and introduce cross-layer design for a low-po... [more]	ICD2007-49 pp.71-76
ICD, ITE-IST	2007-07-26 16:05	Hyogo		A 356-µW, 433-MHz, Rail-to-Rail Voltage Amplifier with Carrier Sensing Function for Wireless Sensor Networks Hyeokjong Lee, Shinji Mikami, Takashi Takeuchi, Masumi Ichien, Hiroshi Kawaguchi, Chikara Ohta, Masahiko Yoshimoto (Kobe Univ.) ICD2007-50	We describe a low-power voltage amplifier that is suitable for RF (radio frequency) receivers in a WSN (wireless sensor ... [more]	ICD2007-50 pp.77-82
ICD, ITE-IST	2007-07-26 16:30	Hyogo		Component Circuits of Passive Sensor Tag for Biomedical Monitoring Kouta Kano, Shingo Nakano, Junichi Akita, Akio Kitagawa (Kanazawa Univ) ICD2007-51	In this paper, we describe the component circuits of passive RF tag for biomedical monitoring using 950MHz-Band RF-tag s... [more]	ICD2007-51 pp.83-88
ICD, ITE-IST	2007-07-26 17:05	Hyogo		Low power consumption of H.264/AVC decoder with dynamic voltage and frequency scaling Yoshinori Sakata, Kentaro Kawakami, Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.) ICD2007-52	We propose an elastic pipeline architecture that can apply dynamic voltage scaling (DVS) to a dedicated hardware, and ap... [more]	ICD2007-52 pp.89-94
ICD, ITE-IST	2007-07-26 17:30	Hyogo		A 10T Non-Precharge Two-Port SRAM for 74% Power Reduction in Video Processing Shunsuke Okumura, Hiroki Noguchi, Yusuke Iguchi, Hidehiro Fujiwara, Yasuhiro Morita (Kobe Univ.), Koji Nii (Kobe Univ./Renesas Technology), Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.) ICD2007-53	We propose a low-power non-precharge-type two-port SRAM for video processing. The proposed memory cell (MC) has ten tran... [more]	ICD2007-53 pp.95-100
ICD, ITE-IST	2007-07-27 08:30	Hyogo		A Study of Clock and Data Recovery Circuits with Wide Band VCO Tomoyuki Tanaka (Osaka Univ./Synthesis), Tsukasa Ida, Guechol Kim, Toshimasa Matsuoka, Kenji Taniguchi (Osaka Univ.) ICD2007-54	We proposed wide band Clock and Data Recovery circuits (CDR) with VCO-control-voltage recovery block which avoid the loo... [more]	ICD2007-54 pp.101-105
ICD, ITE-IST	2007-07-27 08:55	Hyogo		A 1GHz to 2GHz 4-Phase On-Chip Clock Generator with Timing Margin Test Capability Shunichi Kaeriyama, Mikihiro Kajita, Masayuki Mizuno (NEC) ICD2007-55	A functional clock generator presented here makes timing margin testing possible. The clock generator provides the follo... [more]	ICD2007-55 pp.107-112
ICD, ITE-IST	2007-07-27 09:20	Hyogo		76GHz CMOS Voltage-Controlled Oscillator with 7% Frequency Tuning Ran Mizuki Motoyoshi, Minoru Fujishima (The Univ. of Tokyo) ICD2007-56	To improve the tuning range and phase noise in W-band CMOS voltage-controlled oscillators (VCOs), we propose a new ring-... [more]	ICD2007-56 pp.113-115
ICD, ITE-IST	2007-07-27 09:45	Hyogo		A PVT Tolerant PLL with On-Chip Loop-Transfer-Function Calibration Circuit M.Kondou (Fujitsu Laboratoried Ltd), T.Mori (Fujitsu Limited) ICD2007-57	A PVT tolerant PLL architecture which uses two on-chip digital calibration circuits to maintain loop transfer function i... [more]	ICD2007-57 pp.117-121
ICD, ITE-IST	2007-07-27 10:20	Hyogo		A development of an LSI for 1Gbit/s home router Yukikuni Nishida, Kenji Kawai, Keiichi Koike (NTT), Katsuichi Oyama (NTT Electronics) ICD2007-58	The band-width became widely by spread of FTTH and triple play services are provided on the Internet. A service provider... [more]	ICD2007-58 pp.123-128
ICD, ITE-IST	2007-07-27 10:45	Hyogo		Electrical Characteristics of MAGFET With On-Chip Coil Hirokazu Hashimoto (The Univ. of Tokyo), Makoto Ikeda, Kunihiro Asada (VDEC) ICD2007-59	MAGFET ( Magnetic MOS Field-Effect Transistor ) is one of the magnetic sensors, which is capable of sensing a magnetic f... [more]	ICD2007-59 pp.129-134
ICD, ITE-IST	2007-07-27 11:10	Hyogo		A detachable high-speed wireless interface for LSI logic monitoring using pulse-based inductive-coupling technique Hiroki Ishikuro (Keio Univ.), Toshihiko Sugahara, Yoichi Takahata (Renesas Solutions Corp.), Shunichi Iwata (Renesas Technology Corp.), Yutaka Takikawa (Renesas Design Corp.), Tadahiro Kuroda (Keio Univ.) ICD2007-60	A detachable high-speed wireless interface was developed for monitoring of logic operation of a Si-chip through LSI pack... [more]	ICD2007-60 pp.135-140
ICD, ITE-IST	2007-07-27 11:35	Hyogo		A 426MHz transmitter for multiuser MIMO systems Ryosei Makino, Shigeru Fujieda, Kei Hayase, Junichi Akita, Akio Kitagawa (Kanazawa Univ.) ICD2007-61	This paper describes mainly the design and simulation of transmitter complying with ARIB STD-T67 and RCR STD-30 standard... [more]	ICD2007-61 pp.141-146
ICD, ITE-IST	2007-07-27 13:00	Hyogo		[Invited Talk] * Norio Ohkubo (Hitachi) ICD2007-62	I describe power generator techniques and power control techniques for the ubiquitous power supply. In particular, we ha... [more]	ICD2007-62 pp.147-152
ICD, ITE-IST	2007-07-27 13:50	Hyogo		Circuits Technologies for Wireless Power Transmission Sheet with Organic FETs and Plastic MEMS Switches Hiroshi Kawaguchi (Kobe University), Makoto Takamiya, Tsuyoshi Sekitani, Yoshio Miyamoto, Yoshiaki Noguchi, Takao Someya, Takayasu Sakurai (kawapy@godzilla.kobe-u.ac.jp) ICD2007-63	Design innovations to overcome the shortcomings of a wireless power transmission sheet made with plastic MEMS switches a... [more]	ICD2007-63 pp.153-158
ICD, ITE-IST	2007-07-27 14:15	Hyogo		Power Line Transceiver on Conductuve Fabric for Wearable Computing Junichi Akita, Tomomichi Murakami (Kanazwa Univ.), Masashi Toda (FUN) ICD2007-64	Recent developments in computer systems and network systems based on VLSI technology enabled us to carry electronic equi... [more]	ICD2007-64 pp.159-164
ICD, ITE-IST	2007-07-27 14:50	Hyogo		A Study on CMOS Image Sensor with Nonperiodic Pixel Placement Yuuki Iwabuchi, Junichi Akita (Kanazawa Univ.) ICD2007-65	The pixels in image sensors and displays are placed at lattice positions. The images handled by these devices are final... [more]	ICD2007-65 pp.165-170
ICD, ITE-IST	2007-07-27 15:15	Hyogo		An image reproduction method and estimation of its S/N in a CMOS imager by hybrid use of active and passive pixel readouts Keiichiro Kagawa (NAIST), Yugo Nose, Kuniyuki Tani, Atsushi Wada (Sanyo Electric Co., Ltd.), Masahiro Nunoshita, Jun Ohta (NAIST) ICD2007-66	We have proposed a dynamic range extension method of the CMOS imagers with an in-pixel lateral overflow structure. In th... [more]	ICD2007-66 pp.171-176
ICD, ITE-IST	2007-07-27 15:40	Hyogo		Motion detection by using a negative feedback image sensor Masayuki Ikebe, Naofumi Sakuraya (Hokkaido Univ.) ICD2007-67	We have investigated a excellent method to extend the dynamic range of a CMOS image sensor and product trial sensor arra... [more]	ICD2007-67 pp.177-182
ICD, ITE-IST	2007-07-27 16:05	Hyogo		Wide-dynamic-range image sensor for object detection Akira Ohno, Hisayuki Taruki, Takayuki Hamamoto (TUS), Fumie Ono (Yokohama National Univ.), Tomoshi Sasaki, Toshihito Shirai, Masayoshi Sakai (NIPPON SIGNAL) ICD2007-68	We have been investigating a method to detect moving objects to suppress an influence of change of environment light by ... [more]	ICD2007-68 pp.183-188
ICD, SDM	2007-08-23 08:30	Hokkaido	Kitami Institute of Technology	Development of a Multi-Core SoC with 9 CPUs and 2 Matrix Processors Masami Nakajima, Koichi Ishimi, Hayato Fujiwara, Kazuya Ishida, Naoto Okumura, Norio Masui, Hiroyuki Kondo (Renesas) SDM2007-141 ICD2007-69	A multi-core SoC for multi-application (recognition, inference, measurement, control, and security) is developed. The co... [more]	SDM2007-141 ICD2007-69 pp.1-4
ICD, SDM	2007-08-23 08:55	Hokkaido	Kitami Institute of Technology	Homogenous Dual-Processor core with Shared L1 Cache for Mobile Multimedia SoC Tetsu Hosoki, Takao Yamamoto, Masayuki Yamasaki, Keisuke Kaneko, Masaitsu Nakajima (Matsushita Electric Industrial Co., Ltd.) SDM2007-142 ICD2007-70	We propose a novel dual-processor core which adopts a shared L1 cache with active way scheme. In this scheme, each way o... [more]	SDM2007-142 ICD2007-70 pp.5-9
ICD, SDM	2007-08-23 09:20	Hokkaido	Kitami Institute of Technology	Evaluation of Heterogeneous Multicore Architecture with AAC-LC Stereo Encoding Hiroaki Shikano (Hitachi/./Waseda Univ.), Masaki Ito, Takashi Todaka, Takanobu Tsunoda, Tomoyuki Kodama, Masafumi Onouchi, Kunio Uchiyama (Hitachi), Toshihiko Odaka (Hitachi/./Waseda Univ.), Tatsuya Kamei, Ei Nagahama, Manabu Kusaoke, Yusuke Nitta (Renesas Technology), Yasutaka Wada, Keiji Kimura, Hironori Kasahara (Waseda Univ.) SDM2007-143 ICD2007-71	This paper describes a heterogeneous multi-core processor (HMCP) architecture which integrates general purpose processor... [more]	SDM2007-143 ICD2007-71 pp.11-16
ICD, SDM	2007-08-23 09:45	Hokkaido	Kitami Institute of Technology	Fast Motion Estimation Algorithm and a Low Power Motion Estimation Processor Implementing Dynamic Voltage and Frequency Scaling Nobuaki Kobayashi, Tadayoshi Enomoto (Chuo Univ.) SDM2007-144 ICD2007-72	[more]	SDM2007-144 ICD2007-72 pp.17-21
ICD, SDM	2007-08-23 10:20	Hokkaido	Kitami Institute of Technology	[Special Invited Talk] Design Trends of High Performance PLLs and DLLs Shiro Dosho (Matsushita) SDM2007-145 ICD2007-73	[more]	SDM2007-145 ICD2007-73 pp.23-28
ICD, SDM	2007-08-23 11:10	Hokkaido	Kitami Institute of Technology	Multiphase-Output Level Shift System used in Multiphase PLL for Low Power Application Akinori Matsumoto, Shiro Sakiyama, Yusuke Tokunaga, Takashi Morie, Shiro Dosho (Matsushita) SDM2007-146 ICD2007-74	Low power design is essential for mobile application. For a PLL with multiphase outputs, level shifter (LS), which conve... [more]	SDM2007-146 ICD2007-74 pp.29-34
ICD, SDM	2007-08-23 11:35	Hokkaido	Kitami Institute of Technology	A Periodically All-in-Phase Clocking Architecture for Multi-Core SOC Platforms Atsufumi Shibayama, Koichi Nose, Sunao Torii, Masayuki Mizuno, Masato Edahiro (NEC) SDM2007-147 ICD2007-75	Methods for clock generation, distribution, and synchronization in system-on-chip (SOC) designs have become important is... [more]	SDM2007-147 ICD2007-75 pp.35-40
ICD, SDM	2007-08-23 12:50	Hokkaido	Kitami Institute of Technology	[Special Invited Talk] Past and Future of Dynamic Voltage Scaling Hiroyuki Mizuno (Hitachi) SDM2007-148 ICD2007-76	Effectiveness and issue for Dynamic Voltage Scaling (DVS) have been described. Both dynamic and leakage power reduction ... [more]	SDM2007-148 ICD2007-76 pp.41-46
ICD, SDM	2007-08-23 13:40	Hokkaido	Kitami Institute of Technology	Energy comparison between various supply voltage scheme for System LSI Satoshi Hanami, Shigeyoshi Watanabe, Manabu Kobayashi, Toshinori Takabatake (SIT) SDM2007-149 ICD2007-77	[more]	SDM2007-149 ICD2007-77 pp.47-50
ICD, SDM	2007-08-23 14:05	Hokkaido	Kitami Institute of Technology	Design of high-speed low-power dual-supply-voltage sysytem LSI taking into account of gate/sub-threshold leakage current Shigeyoshi Watanabe, Satoshi Hanami, Manabu Kobayashi, Toshinori Takabatake (SIT) SDM2007-150 ICD2007-78	[more]	SDM2007-150 ICD2007-78 pp.51-56
ICD, SDM	2007-08-23 14:35	Hokkaido	Kitami Institute of Technology	An Optimal Supply Voltage Determiner Circuit for Minimum Energy Operations Yoshifumi Ikenaga, Masahiro Nomura, Yoetsu Nakazawa, Yasuhiko Hagihara (NEC Corp.) SDM2007-151 ICD2007-79	[more]	SDM2007-151 ICD2007-79 pp.57-62
ICD, SDM	2007-08-23 15:00	Hokkaido	Kitami Institute of Technology	Power Measurement for a Multiplier with Run Time Power Gating Toshihiro Kashima, Seidai Takeda, Toshiaki Shirai, Naoaki Ohkubo, Kimiyoshi Usami (S.I.T) SDM2007-152 ICD2007-80	This paper describes a result of measurement of a Multiplier with Run Time Power Gating (RTPG). This multiplier has a sc... [more]	SDM2007-152 ICD2007-80 pp.63-68
ICD, SDM	2007-08-23 15:25	Hokkaido	Kitami Institute of Technology	A 1.92us-wake-up time thick-gate-oxide power switch technique for ultra low-power single-chip mobile processors Kazuki Fukuoka, Osamu Ozawa, Ryo Mori, Yasuto Igarashi, Toshio Sasaki, Takashi Kuraishi, Yoshihiko Yasu, Koichiro Ishibashi (Renesas Technology) SDM2007-153 ICD2007-81	A technique for controlling rush current and wake-up time of thick-gate-oxide power switches is described. Suppressing t... [more]	SDM2007-153 ICD2007-81 pp.69-73
ICD, SDM	2007-08-23 16:00	Hokkaido	Kitami Institute of Technology	[Panel Discussion] Dynamic Voltage & Frequency Scaling ; A Key Technology for Deep Sub-100nm SoCs ! Tadayoshi Enomoto (Chuo Univ.), Naohiko Irie (Hitachi), Hiroshi Okano (Fujitsu), Shiro Sakiyama (Matsushita), Masakatsu Nakai (Sony), Koji Nii (Renesas Technology), Masahiro Nomura (NEC), Hiroyuki Mizuno (Hitachi) SDM2007-154 ICD2007-82	[more]	SDM2007-154 ICD2007-82 pp.75-78
ICD, SDM	2007-08-24 08:30	Hokkaido	Kitami Institute of Technology	A Very Wideband Fully Balanced Active RC Polyphase Filter Based on CMOS Inverters in 0.18μm CMOS Technology Keishi Komoriyama, Eiich Yoshida, Makoto Yashiki, Hiroshi Tanimoto (Kitami Inst. Tech.) SDM2007-155 ICD2007-83	A very wideband active RC polyphase filter(RCPF) is presented. It can expand image-rejection band of passive RCPF. To ... [more]	SDM2007-155 ICD2007-83 pp.79-84
ICD, SDM	2007-08-24 08:55	Hokkaido	Kitami Institute of Technology	Fine-Grained In-Circuit Continuous-Time Probing Technique of Dynamic Supply Variation in SoCs Mitsuya Fukazawa, Tetsuro Matsuno, Toshifumi Uemura (Kobe Univ.), Rei Akiyama (Renesas Design), Tetsuya Kagemoto, Hiroshi Makino, Hidehiro Takata (Renesas Technology), Makoto Nagata (Kobe Univ.) SDM2007-156 ICD2007-84	Fine-grained built-in probing circuits are distributed at 120 locations on the SoC to allow continuous-time monitoring o... [more]	SDM2007-156 ICD2007-84 pp.85-90
ICD, SDM	2007-08-24 09:20	Hokkaido	Kitami Institute of Technology	An On-Chip Noise Canceller with High Voltage Supply Lines for Nanosecond-Range Power Supply Noise Yasumi Nakamura, Makoto Takamiya, Takayasu Sakurai (Univ. of Tokyo) SDM2007-157 ICD2007-85	An on-chip noise canceller with high voltage supply lines for the nanosecond-range power supply noise is proposed. The ... [more]	SDM2007-157 ICD2007-85 pp.91-94
ICD, SDM	2007-08-24 09:45	Hokkaido	Kitami Institute of Technology	A Microwave-Powered CMOS Power Supply Circuit for Integrated Si-MEMS Microsensors Daiki Endo (TUT), Hidekuni Takao (TUT/JST-CREST), Syunsuke Kizuna (TUT), Kazuaki Sawada, Makoto Ishida (TUT/JST-CREST) SDM2007-158 ICD2007-86	In this paper, a design and a basic experimental result of CMOS stabilized power supply circuit for wireless drive of mi... [more]	SDM2007-158 ICD2007-86 pp.95-100
ICD, SDM	2007-08-24 10:20	Hokkaido	Kitami Institute of Technology	[Special Invited Talk] Effect of metal-gate/high-k on characteristics of MOSFETs for 32nm CMOS and beyond Masato Koyama, Masahiro Koike, Yuuichi Kamimuta, Masamichi Suzuki, Kosuke Tatsumura, Yoshinori Tsuchiya, Reika Ichihara, Masakazu Goto, Koji Nagatomo, Atsushi Azuma, Shigeru Kawanaka, Kazuaki Nakajima, Katsuyuki Sekine (Toshiba Corp.) SDM2007-159 ICD2007-87	In this paper, influences of metal-gate and high-k gate dielectric application on MOSFET (32nm node and beyond) characte... [more]	SDM2007-159 ICD2007-87 pp.101-106
ICD, SDM	2007-08-24 11:10	Hokkaido	Kitami Institute of Technology	Experimental Study on Mobility Universality in (100) Ultra Thin Body nMOSFET with SOI thickness of 5 nm Ken Shimizu, Toshiro Hiramoto (Univ. of Tokyo) SDM2007-160 ICD2007-88	Experimental study on mobility universality in (100) oriented ultrathin body SOI nMOSFETs was performed for the first ti... [more]	SDM2007-160 ICD2007-88 pp.107-111
ICD, SDM	2007-08-24 11:35	Hokkaido	Kitami Institute of Technology	An analysis of asymmetry and orientation dependence of n-MOSFETs Toshihiro Matsuda, Yuya Sugiyama, Hideyuki Iwata (Toyama Pref. Univ.), Takashi Ohzone (Okayama Pref. Univ.) SDM2007-161 ICD2007-89	n-MOSFETs with 8 different channel orientation and three kinds of process conditions were measured and symmetry of IDsat... [more]	SDM2007-161 ICD2007-89 pp.113-116
ICD, SDM	2007-08-24 13:00	Hokkaido	Kitami Institute of Technology	[Special Invited Talk] Towards Great Nanoelectronics Country, Japan Hisatsune Watanabe (Selete) SDM2007-162 ICD2007-90	[more]	SDM2007-162 ICD2007-90 p.117
ICD, SDM	2007-08-24 13:50	Hokkaido	Kitami Institute of Technology	Design of High Density LSI with Three-Dimensional Transistor FinFET -- Effect of Pattern Area Reduction with CMOS Cell Library -- Keisuke Okamoto, Keisuke Koizumi, Yu Hiroshima, Shigeyoshi Watanabe (SIT) SDM2007-163 ICD2007-91	New design method of system LSI with FinFET has been developed. Using planar+FinFET architecture the pattern area of CMO... [more]	SDM2007-163 ICD2007-91 pp.119-124
ICD, SDM	2007-08-24 14:15	Hokkaido	Kitami Institute of Technology	Ｄesign Method of system LSI with FinFET type DTMOS Yu Hiroshima, Shigeyoshi Watanabe, Keisuke Okamoto, Keisuke Koizumi (SIT) SDM2007-164 ICD2007-92	Planar DTMOS has a problem of increase of pattern area. Using FinFET type DTMOS excess pattern area of connect to gate a... [more]	SDM2007-164 ICD2007-92 pp.125-130
ICD, SDM	2007-08-24 14:50	Hokkaido	Kitami Institute of Technology	0.7 V SRAM Technology with Stress-Enhanced Dopant Segregated Schottky (DSS) Source/Drain Transistors for 32 nm Node Hiroyuki Onoda, Katsura Miyashita, Takeo Nakayama, Tomoko Kinoshita, Hisashi Nishimura, Atsushi Azuma, Seiji Yamada, Fumitomo Matsuoka (Toshiba) SDM2007-165 ICD2007-93	For the fist time, low supply voltage SRAM operation with stress-enhanced dopant segregated Schottky (DSS) source/drain ... [more]	SDM2007-165 ICD2007-93 pp.131-134
ICD, SDM	2007-08-24 15:15	Hokkaido	Kitami Institute of Technology	SPRAM (SPin-transfer torque RAM) with a synthetic ferrimagnetic free layer for suppressing read disturbance and write-current dispersion Katsuya Miura, Takayuki Kawahara, Riichiro Takemura (Hitachi, Ltd.), Jun Hayakawa (Hitachi, Ltd./Tohoku Univ.), Michihiko Yamanouchi (Hitachi, Ltd.), Shoji Ikeda, Ryutaro Sasaki (Tohoku Univ.), Kenchi Ito, Hiromasa Takahashi, Hideyuki Matsuoka (Hitachi, Ltd.), Hideo Ohno (Tohoku Univ.) SDM2007-166 ICD2007-94	SPin-transfer torque RAM (SPRAM) with MgO-barrier-based magnetic tunnel junctions (MTJs) is a promising candidate for a ... [more]	SDM2007-166 ICD2007-94 pp.135-138
ICD, SDM	2007-08-24 15:40	Hokkaido	Kitami Institute of Technology	An Area-Conscious Low-Voltage-Oriented 8T-SRAM Design under DVS Environment Yasuhiro Morita, Hidehiro Fujiwara, Hiroki Noguchi, Yusuke Iguchi (Kobe Univ.), Koji Nii (Kobe Univ./Renesas Technology), Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.) SDM2007-167 ICD2007-95	This paper demonstrates that an 8T memory cell can be alternative design to a 6T cell in a future highly-integrated SRAM... [more]	SDM2007-167 ICD2007-95 pp.139-144
ICD, SDM	2007-08-24 16:05	Hokkaido	Kitami Institute of Technology	A 45nm 2port 8T-SRAM using hierarchical replica bitline technique with immunity from simultaneous R/W access issues Satoshi Ishikura, M. Kurumada, Toshio Terano, Yoshinobu Yamagami, Naoki Kotani, Katsuji Satomi (Matushita Electric Industrial), Koji Nii, Makoto Yabuuchi, Yasumasa Tsukamoto, Shigeki Ohbayashi, Toshiyuki Oashi, Hiroshi Makino, Hirofumi Shinohara (Renesas Technology), Hironori Akamatsu (Matushita Electric Industrial) SDM2007-168 ICD2007-96	We propose a new 2port SRAM with a 8T single-read-bitline (SRBL) memory cell for 45nm SOCs. Access time tends to be slow... [more]	SDM2007-168 ICD2007-96 pp.145-148
ICD, SDM	2007-08-24 16:30	Hokkaido	Kitami Institute of Technology	A 128-Kbit, 16-Port SRAM Design with Multi-Stage-Sensing Scheme in 90-nm CMOS Technology Koh Johguchi, Yuya Mukuda, Shinya Izumi, Hans Juergen Mattausch, Tetsushi Koide (Hiroshima Univ.) SDM2007-169 ICD2007-97	[more]	SDM2007-169 ICD2007-97 pp.149-154
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-25 09:30	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	A Study of Frame Buffer Cache Architecture Ryohei Ishida, Yoshiyuki Kato (Mitsubishi Electric Corp.) SIP2007-109 ICD2007-98 IE2007-68	Frame buffer data, which is stored as two dimensional data, is accessed sequentially in both horizontal and vertical dir... [more]	SIP2007-109 ICD2007-98 IE2007-68 pp.1-4
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-25 09:50	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	Vehicle Detection Algorithm Using Three-Dimensional Information and Its VLSI Architecture Kensaku Yamashita, Akio Sasaki, Masanori Hariyama, Michitaka Kameyama (Tohoku Univ.) SIP2007-110 ICD2007-99 IE2007-69	This paper presents a vehicle detection algorithm using 3-dimensional(3-D) information and its VLSI architecture. For hi... [more]	SIP2007-110 ICD2007-99 IE2007-69 pp.5-9
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-25 10:10	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	VLSI Architecture Based on Data Compression and Its Application Hisashi Yoshida (Tohoku Univ.), Yasuhiro Kobayashi (Oyama National College of Technology), Masanori Hariyama, Michitaka Kameyama (Tohoku Univ.) SIP2007-111 ICD2007-100 IE2007-70	To design low-power and high-speed image processors, the reduction of the number of interconnection units plays an impor... [more]	SIP2007-111 ICD2007-100 IE2007-70 pp.11-14
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-25 10:45	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	[Invited Talk] - -, Toru Baji (Renesas), - (Hitachi) SIP2007-112 ICD2007-101 IE2007-71	[more]	SIP2007-112 ICD2007-101 IE2007-71 p.15
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-25 11:30	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	Super High Speed, Sub-sampling Motion Estimation Algorithm Employing Adaptively Assigned Search Window Sizes Shimon Isaka, Tadayoshi Enomoto (Chuo Univ.) SIP2007-113 ICD2007-102 IE2007-72	A “fast motion vector estimation (ME) algorithm employing adaptively assigned search area sizes followed by hierarchical... [more]	SIP2007-113 ICD2007-102 IE2007-72 pp.17-22
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-25 11:50	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	An Analog Moving-Object-Localization VLSI System Employing OR-Amplification of Pixel Activities Yusuke Niki, Yasuo Manzawa, Satoshi Kametani, Tadashi Shibata (Univ. of Tokyo) SIP2007-114 ICD2007-103 IE2007-73	An analog VLSI for real-time moving object localization has been developed based on binarized pixel data (activity bits)... [more]	SIP2007-114 ICD2007-103 IE2007-73 pp.23-28
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-25 13:15	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	[Invited Talk] - Takeshi Ikenaga (Waseda Univ.) SIP2007-115 ICD2007-104 IE2007-74	[more]	SIP2007-115 ICD2007-104 IE2007-74 pp.29-34
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-25 14:00	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	A Multiple-Chip Architecture For K-means Learning Processor Systems Yitao Ma, Tadashi Shibata (Tokyo Univ.) SIP2007-116 ICD2007-105 IE2007-75	Abstract For improvement of image recognition system, a K-means processor has been developed with gravity detection ar... [more]	SIP2007-116 ICD2007-105 IE2007-75 pp.35-40
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-25 14:20	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	New Compact and Power-Efficient Implementations of Rank-Order-Filters and Sorting Engines Using Time-Domain Technique Liem T. Nguyen, Kiyoto Ito, Tadashi Shibata (Univ. of Tokyo) SIP2007-117 ICD2007-106 IE2007-76	A compact and power-efficient digital implementation of rank order filters compatible with focal-plane image processing ... [more]	SIP2007-117 ICD2007-106 IE2007-76 pp.41-46
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-25 14:40	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	Mixed-Signal Simulation Methodology for a Highly Collision-Resistive RFID System Naoki Gochi (Kobe Univ.), Yohei Fukumizu (Tokyo Tech.), Makoto Nagata (Kobe Univ.) SIP2007-118 ICD2007-107 IE2007-77	A highly collision-resistive RFID system multiplexes communications between thousands of transponders and a single reade... [more]	SIP2007-118 ICD2007-107 IE2007-77 pp.47-51
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-25 15:15	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	[Invited Talk] Present situation and future perspective of video codec using DSP Tomoyuki Naito (TI Japan)	[more]
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-25 16:00	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	Study on a TOPS scale DSP Hiroshi Suzuki, Takao Nishitani, Wu Bin, Hachiro Fujita (TMU) SIP2007-119 ICD2007-108 IE2007-78	[more]	SIP2007-119 ICD2007-108 IE2007-78 pp.53-58
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-25 16:20	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	Foreground Segmentation Using Spatio-Temporal Processing -- A Study on TOPS DSP Architecture Driven Algorithm for Foreground Segmentation -- Hiroaki Tezuka, Tomoyuki Suzuki, Takao Nishitani (Tokyo Metropolitan Univ.) SIP2007-120 ICD2007-109 IE2007-79	This paper describes a robust foreground segmentation algorithm in HDTV video sequence. The present algorithm is based ... [more]	SIP2007-120 ICD2007-109 IE2007-79 pp.59-64
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-25 16:40	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	VLSI Architecture of Multi-Symbol CABAC Decoder for H.264/AVC High Profile Kimiya Kato, Ryoji Hashimoto (Osaka Univ.), Gen Fujita (Osaka Electro-Comm. Univ.), Takao Onoye (Osaka Univ.) SIP2007-121 ICD2007-110 IE2007-80	In H.264/AVC real-time decoding process, CABAC (Context-based Adaptive Binary Arithmetic Coding) is an efficient entro... [more]	SIP2007-121 ICD2007-110 IE2007-80 pp.65-70
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-25 17:00	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	A Study on Geometric Correction for Projected Images Based on 3D Measurement Toru Takahashi, Norihito Numa, Takafumi Aoki (Tohoku Univ.), Satoshi Kondo (Matsushita Electric Industrial Co., Ltd.) SIP2007-122 ICD2007-111 IE2007-81	[more]	SIP2007-122 ICD2007-111 IE2007-81 pp.71-76
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-26 09:00	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	Performance Evaluation of Variable Length Encoder/Decoder Hardware Takafumi Yuasa, Hiroaki Nakata (Hitachi, Ltd.), Kazushi Akie, Fumitaka Izuhara, Kenichi Iwata (Renesas Technology Corp.) SIP2007-123 ICD2007-112 IE2007-82	We developed Variable Length Encoder/Decoder hardware for multi-codecs. Our hardware processes VLC(Variable Length Code)... [more]	SIP2007-123 ICD2007-112 IE2007-82 pp.1-5
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-26 09:20	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	Group-Based Image Retrieval Method Noboru Murabayashi, Setsuya Kurahashi, Kenichi Yoshida (Univ. of Tsukuba) SIP2007-124 ICD2007-113 IE2007-83	This paper proposes a group-based image retrieval method for video annotation systems. Although the wide spread use of... [more]	SIP2007-124 ICD2007-113 IE2007-83 pp.7-12
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-26 09:40	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	Estimation of Translation, Rotation and Scaling Based on Random Sampling of Sector Region Luminosity Correlation's Motion Vectors Kyota Aoki (Utsunomiya Univ.) SIP2007-125 ICD2007-114 IE2007-84	[more]	SIP2007-125 ICD2007-114 IE2007-84 pp.13-18
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-26 10:00	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	A Projective Transformation of VGA Video Images Realized by the use of a small-scall DSP with Parallel DataPaths -- Two Proposals for Fast Transformation -- Ryo Ozaki, Hiroshi Ohta (Okayama Univ. of Science), Yuji Sugiyama, Takuji Okamoto (Okayama Univ.) SIP2007-126 ICD2007-115 IE2007-85	This paper describes a projective transformation for VGA video image with a small-scale DSP which have parallel data-pat... [more]	SIP2007-126 ICD2007-115 IE2007-85 pp.19-24
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-26 10:20	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	[Invited Talk] - Masakazu Yagi, -, -, -, -, -, Kenji Takada (Osaka Univ.) SIP2007-127 ICD2007-116 IE2007-86	The technique to develop an intelligent system performing the expertise judgment is proposed in this study. The techniqu... [more]	SIP2007-127 ICD2007-116 IE2007-86 pp.25-30
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-26 11:15	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	An Experimental Study of Sub-Pixel Motion Estimation Norihito Numa, Takafumi Aoki (Tohoku Univ.) SIP2007-128 ICD2007-117 IE2007-87	In this paper, we present an experimental study of sub-pixel motion estimation techniques for video sequences. Motion es... [more]	SIP2007-128 ICD2007-117 IE2007-87 pp.31-36
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-26 11:35	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	A Passive 3D Face Recognition System and Its Performance Evaluation Akihiro Hayasaka, Takuma Shibahara, Koichi Ito, Takafumi Aoki (Tohoku Univ.), Hiroshi Nakajima, Koji Kobayashi (Yamatake Corporation) SIP2007-129 ICD2007-118 IE2007-88	This paper proposes a three-dimensional (3D) face recognition system using passive stereo vision. So far, the reported ... [more]	SIP2007-129 ICD2007-118 IE2007-88 pp.37-42
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-26 11:55	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	Analysis of an Adaptive Algorithm for Feedback Cancellation in Hearing Aids for Sinusoidal Signals Hideaki Sakai (Kyoto Univ.) SIP2007-130 ICD2007-119 IE2007-89	[more]	SIP2007-130 ICD2007-119 IE2007-89 pp.43-47
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-26 13:15	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	[Invited Talk] - Koji Inoue (Kyushu Univ.)	[more]
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-26 14:00	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	2D array processor featuring ternary input fused operations Yuka Sato, Yuusuke Nomoto, Toshiaki Miyazaki, Stanislav G. Sedukhin (Univ. of Aizu)	[more]
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-26 14:20	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	A hardware algorithm for lane recognition sysytems Takeshi Terakawa, Masahiro Fukui (Ritsumeikan Univ.)	Lane Recognition is an essential technique for automotive active safety applications. The lane recognition is relatively... [more]
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-26 14:50	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	- Naohiro Hamada, -, Hiroshi Saito (Univ. of Aizu)	[more]
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-26 15:10	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	- Tadayuki Matsumura, Yuriko Ishitobi, Maziar Goudarzi, Tohru Ishihara, Hiroto Yasuura (Kyushu Univ)	[more]
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-26 15:30	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	A Consideration on Statistical Timing Analysis Taking Slew Variability into Account Shingo Takahashi, Shuji Tsukiyama (Chuo Univ.)	[more]
SIP, ICD, IE, IPSJ-SLDM (Joint) [detail]	2007-10-26 15:50	Fukushima	Aidu-Higasiyama-Onsen Kuturogijuku	- Shiho Hagiwara, Takashi Sato, Kazuya Masu (Tokyo Inst. of Tech.)	[more]
ICD, ITE-CE	2007-12-13 13:00	Kochi		[Invited Talk] An LSI Design of Frame Rate Conversion Technology for LCD-TV Akihisa Yamada (Sharp) ICD2007-120	Recently, Frame Rate Conversion (FRC) technology has attracted attention in that it improves image quality of LCD TV. In... [more]	ICD2007-120 pp.1-5
ICD, ITE-CE	2007-12-13 14:05	Kochi		Current Mode Transceiver at 625Mbps, 3mW in 1.5V for Mobile Applecations Tetsuhiro Ogino, Takefumi Yoshikawa, Makoto Nagata (Kobe Univ.) ICD2007-121	A current-mode data transceiver for mobile applications is described. This transceiver has a multi-level current transmi... [more]	ICD2007-121 pp.7-12
ICD, ITE-CE	2007-12-13 14:30	Kochi		A 1.8 mm2, 11 mA, 23.2 dB-NF, discrete-time filter for GSM/WCDMA/WLAN using retiming technique Tomohiro Sano, Takaya Maruyama, Ikuo Yasui, Hisayasu Sato, Toshihiko Shimizu (Renesas technology Corp.) ICD2007-122	A discrete-time filter for GSM/WCDMA/WLAN with area reduction technique is presented. The discrete-time filtering is sui... [more]	ICD2007-122 pp.13-18
ICD, ITE-CE	2007-12-13 14:55	Kochi		A 2.4GHz ISM-band digital CMOS wireless transceiver with an intra-symbol adaptively intermittent Rx. Haruya Ishizaki, Koichi Nose, Masayuki Mizuno (NEC) ICD2007-123	The first achievement of intra-symbol adaptively intermittent receiver has been developed with an inductor-less LNA by 9... [more]	ICD2007-123 pp.19-23
ICD, ITE-CE	2007-12-13 15:20	Kochi		Wide Lock-Range, Low Phase-Noise PLL using Interpolative Ring-VCO with Coarse Frequency Tuning and Frequency Linearization Hiroshi Kodama, Hiroyuki Okada, Kiyoshi Yanagisawa, Hiromu Ishikawa, Akio Tanaka (NEC) ICD2007-124	[more]	ICD2007-124 pp.25-30
ICD, ITE-CE	2007-12-13 15:45	Kochi		Low-jitter and Large-EMI-reduction Spread-spectrum Clock Generator with Auto-calibration for Serial-ATA Application Takashi Kawamoto (Hitachi), Takayuki Noto, Hiromitsu Inada, Tomoaki Takahashi (Renesas) ICD2007-125	An low jitter voltage-controlled oscillator (VCO) with high-frequency-limiter and an auto-calibration technique suitable... [more]	ICD2007-125 pp.31-36
ICD, ITE-CE	2007-12-13 16:25	Kochi		A new SRAM memory cell with small cell ratio using dynamic stability Yuji Kihara (Renesas Technology), Yutaka Arita (Fujita Health University Collage), Leona Okamura (Waseda University Graduated School), Hirotoshi Sato (Renesas Technology), Tsutomu Yoshihara (Waseda University Graduated School) ICD2007-126	[more]	ICD2007-126 pp.37-40
ICD, ITE-CE	2007-12-13 16:50	Kochi		A Low Dynamic Power and Low Leakage Power 90-nm CMOS SRAM with Wide Operating Margin Takeshi Iwanari, Nobuaki Kobayashi, Tadayoshi Enomoto (Chuo Univ.) ICD2007-127	A large “write” operating margin, low-power, low leakage power 90-nm CMOS 2K-bit SRAM was fabricated incorporating a new... [more]	ICD2007-127 pp.41-46
ICD, ITE-CE	2007-12-13 17:15	Kochi		A Power-Efficient SRAM Core Architecture with Segmentation-Free and Rectangular Accessibility for Super-Parallel Video Processing Yuichiro Murachi, Junichi Miyakoshi, Tetsuya Kamino, Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.) ICD2007-128	This paper describes a unique SRAM architecture for super-parallel video processing. It features one cycle functional ac... [more]	ICD2007-128 pp.47-52
ICD, ITE-CE	2007-12-14 09:15	Kochi		A Study on Mutual Data Transfer Control Circuits for Self-Timed Web-Pipeline Kazuhiro Komatsu, Shuji Sannomiya, Makoto Iwata (Kochi Univ. of Tech.), Suguru Kameda, Kazuo Tsubouchi (Tohoku Univ.) ICD2007-129	The self-timed pipeline (STP) is one of the most promising SoC architectures achieving the efficient utilization of abun... [more]	ICD2007-129 pp.53-58
ICD, ITE-CE	2007-12-14 09:40	Kochi		Digital Signal Processing for Motor Driving with Delta-Sigma Modulated ADC Yasunori Kobori, Tatsuya Furuya, Yoshihisa Yamada, Tomoharu Sato, Tetsuya Taura, Ibuki Mori, Masashi Kono, Kazuyuki Kobayashi, Haruo Kobayashi (Gunma Univ.), Yasuhiko Kokami, Hiroshi Kuroiwa, Minoru Kurosawa (Renesas) ICD2007-130	[more]	ICD2007-130 pp.59-64
ICD, ITE-CE	2007-12-14 10:20	Kochi		A VGA 30-fps Real-Time Optical-Flow Processor Core for Moving Picture Recognition Hajime Ishihara, Masayuki Miyama (Kanazawa Univ.), Yuichiro Murachi, Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.), Yoshio Matsuda (Kanazawa Univ.) ICD2007-131	This paper proposes an optical-flow processor for real-time video recognition. This processor is based on the Pyramidal ... [more]	ICD2007-131 pp.65-70
ICD, ITE-CE	2007-12-14 10:45	Kochi		Four-Pixel accuracy Motion Estimation Unit using Bit-Truncation for Multiple Extended Templates Tomotaka Katano, Saburo Jhonen, Takahiro Sasaki, Kazuhiko Ohno, Toshio Kondo (Mie Univ) ICD2007-132	We proposed a block matching method using bit-truncated images composed of an high frequency 2-bit component and a low f... [more]	ICD2007-132 pp.71-76
ICD, ITE-CE	2007-12-14 11:10	Kochi		Human Extraction Algorithm Using Shape Features and Its Processor Architecture Shota Hashimoto, Akio Sasaki, Masanori Hariyama, Michitaka Kameyama (Tohoku Univ.) ICD2007-133	This paper presents a human detection algorithm using 3-dimensional(3-D) and shape-feature information, and its VLSI arc... [more]	ICD2007-133 pp.77-82
ICD, ITE-CE	2007-12-14 11:35	Kochi		A Field-Programmable VLSI Based on an Asynchronous Bit-Serial Architecture Masanori Hariyama, Shota Ishihara, Michitaka Kameyama (Tohoku Univ.) ICD2007-134	This paper presents a novel asynchronous architecture of Field-programmable gate arrays (FPGAs) to reduce the power co... [more]	ICD2007-134 pp.83-87
ICD, ITE-CE	2007-12-14 13:00	Kochi		[Invited Talk] Recent Trend of Transmission Technology for Super Resolution Images Sei Naito, Shigeyuki Sakazawa, Atsushi Koike (KDDI R&D Labs.) ICD2007-135	As the digital terrestrial broadcasting service becomes a main stream with a nationwide coverage, TV broadcasting, one o... [more]	ICD2007-135 pp.89-94
ICD, ITE-CE	2007-12-14 13:50	Kochi		A Low Power and High Picture Quality H.264/MPEG-4 Video Codec IP for HD Mobile Applications Seiji Mochizuki, Tetsuya Shibayama, Masaru Hase, Fumitaka Izuhara, Kazushi Akie, Masaki Nobori, Ren Imaoka, Hiroshi Ueda, Kazuyuki Ishikawa, Hiromi Watanabe (Renesas Technology Corp.) ICD2007-136	We have developed an H.264/MPEG-4 video codec IP for mobile applications such as digital still cameras (DSCs) and digita... [more]	ICD2007-136 pp.95-100
ICD, ITE-CE	2007-12-14 14:15	Kochi		Versatile Media Processor for Super High Definition (VMP/SHD) -- The scalable architecture of parallel overlay frame engine -- Kenji Toda, Toshihiro Katashita, Yohei Hori, Osamu Morikawa (AIST) ICD2007-137	[more]	ICD2007-137 pp.101-106
ICD, ITE-CE	2007-12-14 14:40	Kochi		A multi matrix-processor core architecture for real-time image processing SoC Katsuya Mizumoto, Takayuki Gyohten, Tetsushi Tanizaki, Soichi Kobayashi, Masami Nakajima, Hiroyuki Yamasaki, Hideyuki Noda, Motoki Higashida, Yoshihiro Okuno, Kazutami Arimoto (Renesas) ICD2007-138	This paper describes a real time image processing SoC(MX-SoC) with programmable multi matrix -processor(MX-Core) archite... [more]	ICD2007-138 pp.107-111
CPM, ICD	2008-01-17 09:15	Tokyo	Kikai-Shinko-Kaikan Bldg	Non-Contact 10% Efficient 36mW Power Delivery Using On-Chip Inductor in 0.18-um CMOS Yuan Yuxiang, Yoichi Yoshida, Tadahiro Kuroda (keio Univ.) CPM2007-128 ICD2007-139	[more]	CPM2007-128 ICD2007-139 pp.1-4
CPM, ICD	2008-01-17 09:40	Tokyo	Kikai-Shinko-Kaikan Bldg	Integrated evaluation of on-chip power supply noise and off-chip electromagnetic noise on digital LSI Yuki Takahashi (Kobe Univ.), Kouji Ichikawa (Denso), Makoto Nagata (Kobe Univ.) CPM2007-129 ICD2007-140	[more]	CPM2007-129 ICD2007-140 pp.5-10
CPM, ICD	2008-01-17 10:05	Tokyo	Kikai-Shinko-Kaikan Bldg	ptimization of Active Substrate Noise Cancellng Technique Using Multi di/dt Detectors Toru Nakura, Taisuke Kazama, Makoto Ikeda, Kunihiro Asada (The Univ. of Tokyo) CPM2007-130 ICD2007-141	This paper demonstrates study on a feedforward active substrate noise cancelling technique using a power supply di/dt de... [more]	CPM2007-130 ICD2007-141 pp.11-16
CPM, ICD	2008-01-17 10:45	Tokyo	Kikai-Shinko-Kaikan Bldg	All Digital Gated Oscillator for Dynamic Supply Noise Measurement Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoye (Osaka Univ.) CPM2007-131 ICD2007-142	This paper proposes an all digital measurement circuit called ``gated oscillator'' for capturing waveforms of dynamic po... [more]	CPM2007-131 ICD2007-142 pp.17-22
CPM, ICD	2008-01-17 11:10	Tokyo	Kikai-Shinko-Kaikan Bldg	Design of an On-Chip Noise Canceller with High Voltage Supply Lines for Nanosecond-Range Power Supply Noise Yasumi Nakamura, Makoto Takamiya, Takayasu Sakurai (Univ. of Tokyo) CPM2007-132 ICD2007-143	An on-chip noise canceller with high voltage supply lines for the nanosecond-range power supply noise is proposed. The ... [more]	CPM2007-132 ICD2007-143 pp.23-27
CPM, ICD	2008-01-17 11:35	Tokyo	Kikai-Shinko-Kaikan Bldg	LSI and PCB Unified Noise Analysis CAD System Toshiro Sato, Hiroyuki Orihara, Shogo Fujimori, Masaki Tosaka (FATEC) CPM2007-133 ICD2007-144	[more]	CPM2007-133 ICD2007-144 pp.29-34
CPM, ICD	2008-01-17 13:00	Tokyo	Kikai-Shinko-Kaikan Bldg	[Special Invited Talk] On-chip monitors and power-supply integrity Makoto Nagata (Kobe Univ.) CPM2007-134 ICD2007-145	[more]	CPM2007-134 ICD2007-145 pp.35-40
CPM, ICD	2008-01-17 13:40	Tokyo	Kikai-Shinko-Kaikan Bldg	[Special Invited Talk] Techniques for power supply noise management in the SX supercomputers Jun Inasaka, Mikihiro Kajita (NEC Corp.) CPM2007-135 ICD2007-146	NEC has developed supercomputers "SX" using the leading-edge LSI technologies. In the latest microprocessors, CMOS trans... [more]	CPM2007-135 ICD2007-146 pp.41-46
CPM, ICD	2008-01-17 14:30	Tokyo	Kikai-Shinko-Kaikan Bldg	[Special Invited Talk] In-situ measurement of supply-noise maps with millivolt accuracy and nanosecond-order time resolution Yusuke Kanno, Yuki Kondoh (HCRL), Takahiro Irita, Kenji Hirose, Ryo Mori, Yoshihiko Yasu (Renesas Technology, Corp.), Shigenobu Komatsu, Hiroyuki Mizuno (HCRL) CPM2007-136 ICD2007-147	An in-situ measurement scheme for generating supply-noise maps, which can be conducted while running applications in pro... [more]	CPM2007-136 ICD2007-147 pp.47-52
CPM, ICD	2008-01-18 09:40	Tokyo	Kikai-Shinko-Kaikan Bldg	Arithmetic operation circuit based on abacus architecture Syunsuke Nagasawa, Shugang Wei (Gunma Univ) CPM2007-137 ICD2007-148	In arithmetic circuits, the carrying propagation limits the operation speed. To shorten the length of the carrying pr... [more]	CPM2007-137 ICD2007-148 pp.53-58
CPM, ICD	2008-01-18 10:05	Tokyo	Kikai-Shinko-Kaikan Bldg	A compact RF signal quality measurement macro for RF test and diagnosis Koichi Nose, Masayuki Mizuno (NEC) CPM2007-138 ICD2007-149	Our RF signal-quality measurement macro employs 1) a new window-shifting measurement technique that obtains the power of... [more]	CPM2007-138 ICD2007-149 pp.59-64
CPM, ICD	2008-01-18 10:30	Tokyo	Kikai-Shinko-Kaikan Bldg	A Method for Measuring Vref Noise Tolerance of DDR2-SDRAM on Test Board that Simulates Memory Module Yutaka Uematsu, Hideki Osaka (Hitachi), Yoji Nishio, Susumu Hatano (Elpida) CPM2007-139 ICD2007-150	Aiming to achieve double data rate-synchronous DRAM (DDR-SDRAM) at low-cost and with high noise tolerance by setting ade... [more]	CPM2007-139 ICD2007-150 pp.65-69
CPM, ICD	2008-01-18 11:10	Tokyo	Kikai-Shinko-Kaikan Bldg	[Tutorial Lecture] Survey of Analysis Techniques for On-chip Power Distribution Networks Takashi Sato (Tokyo Tech.) CPM2007-140 ICD2007-151	Primary techniques and recent trends in power distribution network (PDN) analysis are reviewed in this paper. Quality ... [more]	CPM2007-140 ICD2007-151 pp.71-76
CPM, ICD	2008-01-18 13:00	Tokyo	Kikai-Shinko-Kaikan Bldg	Study on Low Stress Condition of Pseudo-SOC Integration Using Stress Analysis Yutaka Onozuka, Hiroshi Yamada, Atsuko Iida, Kazuhiko Itaya, Hideyuki Funaki (Toshiba R & D Center) CPM2007-141 ICD2007-152	The authors have proposed a pseudo-SOC (System on Chip) technology, forming redistribution global layer with semiconduct... [more]	CPM2007-141 ICD2007-152 pp.77-82
CPM, ICD	2008-01-18 13:25	Tokyo	Kikai-Shinko-Kaikan Bldg	An Extraction Method of Material Constants by Transmission Line Measurements Hiroshi Toyao, Yoshiaki Wakabayashi (NEC) CPM2007-142 ICD2007-153	The material constants of dielectric materials such as solder resist have a large influence on the accuracy of the elect... [more]	CPM2007-142 ICD2007-153 pp.83-86
CPM, ICD	2008-01-18 13:50	Tokyo	Kikai-Shinko-Kaikan Bldg	A Package-on-Package using Coreless Substrate with Excellent Power Integrity Kentaro Mori, Jun Sakai, Katsumi Kikuchi, Shinji Watanabe, Tomoo Murakami, Shintaro Yamamichi (NEC) CPM2007-143 ICD2007-154	(To be available after the conference date) [more]	CPM2007-143 ICD2007-154 pp.87-92
CPM, ICD	2008-01-18 14:15	Tokyo	Kikai-Shinko-Kaikan Bldg	Assessment Test for Solder Joint Reliability in Mobile Products Masazumi Amagai, Hiroyuki Sano (TI Japan) CPM2007-144 ICD2007-155	When a mobile phone is dropped, the frequency of occurrence of cracks in solder joints is high. Voids in intermetallic ... [more]	CPM2007-144 ICD2007-155 pp.93-98
CPM, ICD	2008-01-18 14:55	Tokyo	Kikai-Shinko-Kaikan Bldg	Chip Thinning Technologies Realizing High Chip Strength Shinya Takyu, Tetsuya Kurosawa, Noriko Shimizu, Susumu Harada (Toshiba Co.) CPM2007-145 ICD2007-156	Accompanying the rapid progress of the digital network information society, there is strong demand for high functionalit... [more]	CPM2007-145 ICD2007-156 pp.99-103
CPM, ICD	2008-01-18 15:20	Tokyo	Kikai-Shinko-Kaikan Bldg	A multi-layer wafer-level 5-um-thick Cu wiring technology with photosensitive resin Katsumi Kikuchi (NEC), Kouji Soejima (NECEL), Yasuhiro Ishii (NEC), Masaya Kawano (NECEL), Masayuki Mizuno, Shintaro Yamamichi (NEC) CPM2007-146 ICD2007-157	We have successfully developed a multi-layer wafer-level 5-um-thick Cu wiring technology and an embedded on-chip capacit... [more]	CPM2007-146 ICD2007-157 pp.105-110
CPM, ICD	2008-01-18 15:45	Tokyo	Kikai-Shinko-Kaikan Bldg	A method of Ultra-fine Pad Interconnection using Electroless Deposition Tokihiko Yokoshima, Yasuhiro Yamaji, Yuichiro Tamura, Katsuya Kikuchi, Hiroshi Nakagawa, Masahiro Aoyagi (AIST) CPM2007-147 ICD2007-158	Decrease in bonding temperature and bonding pressure are key challenges for higher interconnection-density packages in r... [more]	CPM2007-147 ICD2007-158 pp.111-116
CPM, ICD	2008-01-18 16:10	Tokyo	Kikai-Shinko-Kaikan Bldg	Reliability evaluation of lead free solder joint against vibration load under thermal circumstance Michiya Matsushima (Osaka Univ.), Toshiyuki Hamano (ESPEC), Kiyokazu Yasuda, Kozo Fujimoto (Osaka Univ.) CPM2007-148 ICD2007-159	The reliability of electronics solder joints is evaluated for each individual stress even if the electronics devices are... [more]	CPM2007-148 ICD2007-159 pp.117-122
VLD, ICD	2008-03-05 13:00	Okinawa	TiRuRu	Automatic synthesis and verification of practical protocol transducer based on product graph exploration Yuji Ishikawa (Univ. of Tokyo), Satoshi Komatsu, Masahiro Fujita (VDEC, Univ. of Tokyo) VLD2007-137 ICD2007-160	[more]	VLD2007-137 ICD2007-160 pp.1-6
VLD, ICD	2008-03-05 13:25	Okinawa	TiRuRu	Task Scheduling Technique for Mitigating SEU Vulnerability of Heterogeneous Multiprocessor Systems Makoto Sugihara (TUT) VLD2007-138 ICD2007-161	Utilizing a heterogeneous multiprocessor system has become a popular design paradigm to build an embedded system at a c... [more]	VLD2007-138 ICD2007-161 pp.7-12
VLD, ICD	2008-03-05 13:50	Okinawa	TiRuRu	An accurate Algorithm for RTL Power Macro-modeling Masaaki Ohtsuki, Masato Kawai, Masahiro Fukui (Ritsumeikan Univ.) VLD2007-139 ICD2007-162	Due to the rapid growth of the electric systems, efficient and lowpower designs have been highly required. To satisfy th... [more]	VLD2007-139 ICD2007-162 pp.13-18
VLD, ICD	2008-03-05 14:15	Okinawa	TiRuRu	Minimizing Minimum Delay Compensations in Datapath Synthesis Keisuke Inoue, Mineo Kaneko, Tsuyoshi Iwagaki (JAIST) VLD2007-140 ICD2007-163	As the feature size of VLSI becomes smaller, delay variations become a serious problem in VLSI design. The ``setup'' tim... [more]	VLD2007-140 ICD2007-163 pp.19-24
VLD, ICD	2008-03-05 14:40	Okinawa	TiRuRu	An Energy-efficent ASIP Synthesis Method Based on Reducing Bit-width of Instruction Memory Shunitsu Kohara, Youhua Shi, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.) VLD2007-141 ICD2007-164	[more]	VLD2007-141 ICD2007-164 pp.25-30
VLD, ICD	2008-03-05 15:20	Okinawa	TiRuRu	Analog Floorplan with Soft-Module Configuration Kentarou Murata, Kazuya Sasaki, Qing Dong, Jing Li, Shigetoshi Nakatake (Univ. of Kitakyushu) VLD2007-142 ICD2007-165	In MOS analog design, the transistor size is increasing as the supply voltage becomes lower, and the layout configurat... [more]	VLD2007-142 ICD2007-165 pp.31-36
VLD, ICD	2008-03-05 15:45	Okinawa	TiRuRu	MOS Analog Module Generation Akio Fujii, Takehiko Matsuo, Toru Fujimura, Bo Yang, Shigetoshi Nakatake (Univ. of Kitakyushu) VLD2007-143 ICD2007-166	This paper addresses the module layout configuration issue of MOS analog LSI. We notice that the key characteristic of t... [more]	VLD2007-143 ICD2007-166 pp.37-42
VLD, ICD	2008-03-05 16:10	Okinawa	TiRuRu	[Fellow Memorial Lecture] Research on VLSI Design and its Future Hiroaki Kunieda (Tokyo Inst. Tech.)	[more]
VLD, ICD	2008-03-06 09:15	Okinawa	TiRuRu	A Design of High Accuracy and Low Power Cyclic ADC using Digital Calibration Tetsuro Ikeda, Atsushi Iwata (Hiroshima Univ.) VLD2007-144 ICD2007-167	This paper proposes a high-accuracy and low-power cyclic ADC using digital calibration technique. By using a cascaded... [more]	VLD2007-144 ICD2007-167 pp.1-6
VLD, ICD	2008-03-06 09:40	Okinawa	TiRuRu	A-90dBm Sensitivity 0.13μm CMOS Bluetooth Transceiver Operating in Wide Temperature Range Kenichi Agawa, Hideaki Majima, Hiroyuki Kobayashi, Masayuki Koizumi, Shinichiro Ishizuka, Takeshi Nagano, Makoto Arai, Yutaka Shimizu, Go Urakawa (Toshiba) VLD2007-145 ICD2007-168	A 2.4GHz 0.13um CMOS Bluetooth transceiver achieving the high RX sensitivity and high-quality TX signals between -40C an... [more]	VLD2007-145 ICD2007-168 pp.7-12
VLD, ICD	2008-03-06 10:05	Okinawa	TiRuRu	Design and Analysis of on-chip leakage monitor using MTCMOS Satoshi Koyama, Seidai Takeda, Kimiyoshi Usami (S.I.T.) VLD2007-146 ICD2007-169	On cutting-edge semiconductor process, leakage current varies drastically due to process variation and temperature chang... [more]	VLD2007-146 ICD2007-169 pp.13-18
VLD, ICD	2008-03-06 10:30	Okinawa	TiRuRu	Design and Evaluation of the component circuits for the PLL Yuko Kitaji, Masayoshi Tachibana (Kochi Univ. of Tech.) VLD2007-147 ICD2007-170	The PLL circuit consists of the phase detector, the loop filter, the voltage-controlled oscillator, and the divider. In ... [more]	VLD2007-147 ICD2007-170 pp.19-24
VLD, ICD	2008-03-06 11:10	Okinawa	TiRuRu	Implementation of LCD Driver by nMOS Dynamic Logic Takuya Hachida, Hideki Matsunaka, Isao Shirakawa (Hyogo Pref. Univ.), Shuji Tsukiyama (Chuo Univ.), Masanori Hashimoto (Osaka Univ.) VLD2007-148 ICD2007-171	[more]	VLD2007-148 ICD2007-171 pp.25-30
VLD, ICD	2008-03-06 11:35	Okinawa	TiRuRu	A Study for Implementation of High Speed Circuit Simulator by using FPGA Taiki Hashizume, Seiji Minoura, Tadashi Mizutani, Hironobu Ishijima, Shinichi Nishizawa (Ritsumeikan Univ.), Masaya Yoshikawa (Meijo Univ.), Masahiro Fukui (Ritsumeikan Univ.) VLD2007-149 ICD2007-172	With recent advanced technology, simulation plays an important role in the design flow. However, the simulation requires... [more]	VLD2007-149 ICD2007-172 pp.31-36
VLD, ICD	2008-03-06 12:00	Okinawa	TiRuRu	Area/Delay/Power Consumption Tradeoff for Multiplier with Tree-structured Partial-product Adders Masayoshi Tachibana (kochi University of Technology) VLD2007-150 ICD2007-173	In this paper we address the area, delay and power consumption tradeoff for multiplier with tree-structured partial prod... [more]	VLD2007-150 ICD2007-173 pp.37-42
VLD, ICD	2008-03-06 13:25	Okinawa	TiRuRu	[Invited Talk] Self descriptive verfication in Continuation based C and it's application to Cell architecture Shinji Kono (University of the Ryukyus)	[more]
VLD, ICD	2008-03-06 14:15	Okinawa	TiRuRu	Conversion to CbC which used the Cell architecture from C Akira Kamizato, Shinji Kono (Univ of ryukyu)	We are proposing Continuation based C(CbC), which is a low level language of C. In this paper, the technique which conv... [more]
VLD, ICD	2008-03-06 14:40	Okinawa	TiRuRu	A Case Study on MPEG4 Decoder Design with SystemBuilder Seiya Shibata, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada (Nagoya Univ.) VLD2007-151 ICD2007-174	This paper presents a case study on designing an MPEG4 decoder system using our system-level design environment named Sy... [more]	VLD2007-151 ICD2007-174 pp.43-48
VLD, ICD	2008-03-06 15:05	Okinawa	TiRuRu	Performance Estimation considering False-paths for System-level Design Daisuke Ando, Takeshi Matsumoto, Tasuku Nishihara, Masahiro Fujita (Univ. of Tokyo) VLD2007-152 ICD2007-175	In designing today's highly complicated system-LSIs, it is essential to estimate timing information such as worst-case o... [more]	VLD2007-152 ICD2007-175 pp.49-54
VLD, ICD	2008-03-06 15:45	Okinawa	TiRuRu	Superposition Effect Validation of Inductive Coupling Noise Based on Measurement of Interconnect Delay Variation Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoye (Osaka Univ.) VLD2007-153 ICD2007-176	Inductive coupling is becoming a design concern for global interconnects in nano-meter technologies. This paper measures... [more]	VLD2007-153 ICD2007-176 pp.55-60
VLD, ICD	2008-03-06 16:10	Okinawa	TiRuRu	Global Routing Method of Plating Lead for 2-Layer BGA Packages Naoki Sato, Yoichi Tomioka, Atsushi Takahashi (Tokyo Tech) VLD2007-154 ICD2007-177	In this paper, we propose a global routing method for 2-layer BGA packages in which the layer assignment of plating le... [more]	VLD2007-154 ICD2007-177 pp.61-66
VLD, ICD	2008-03-06 16:35	Okinawa	TiRuRu	Comparison of Power consumption between dynamic voltage scheme and multi-supply voltage scheme for system LSI Satoshi Hanami, Shigeyoshi Watanabe (Shonan Inst. of Tech.) VLD2007-155 ICD2007-178	Reduction of power dissipation caused by dynamic current, gate leakage current, and subthreshold leakage current of mult... [more]	VLD2007-155 ICD2007-178 pp.67-72
VLD, ICD	2008-03-07 09:15	Okinawa	TiRuRu	A delay balancing technique for wave-pipelining Keiichiro Sano, Jubee Tada (Yamagata Univ), Ryusuke Egawa (Touhoku Univ), Gensuke Goto (Yamagata Univ) VLD2007-156 ICD2007-179	Wave pipeline is a cutting-edge technology as an alternative to traditional pipeline, However, wave pipelining requires ... [more]	VLD2007-156 ICD2007-179 pp.1-6
VLD, ICD	2008-03-07 09:40	Okinawa	TiRuRu	Enhancing Multimedia Processing by Wave-Pipelining a Multifunctional Execution Unit Kazunori Noda, Atuko Yokoyama, Hiroki Takeda, Masa-aki Fukase, Tomoaki Sato (Hirosaki Univ.) VLD2007-157 ICD2007-180	A multimedia mobile processor HCgorilla developed for ubiquitous network was built in Java CPU, cipher logic, and floati... [more]	VLD2007-157 ICD2007-180 pp.7-12
VLD, ICD	2008-03-07 10:05	Okinawa	TiRuRu	A Self-timed Processor with Dynamic Voltage Scaling Taku Sogabe, Makoto Ikeda, Kunihiro Asada (Univ. of Tokyo) VLD2007-158 ICD2007-181	As PVT variations get larger, synchronous circuits are getting less reliable and timing margins are getting larger. Self... [more]	VLD2007-158 ICD2007-181 pp.13-18
VLD, ICD	2008-03-07 10:45	Okinawa	TiRuRu	A High-Throughput Architectures for LDPC Coded OFDM Baseband Processor Shinsuke Ushiki, Koichi Nakamura, Kazunori Shimizu, Qi Wang, Yuta Abe, Satoshi Goto, Takeshi Ikenaga (Waseda Univ.) VLD2007-159 ICD2007-182	It's research target more important that combined OFDM modulation with LDPC codes in digital wireless communication syst... [more]	VLD2007-159 ICD2007-182 pp.19-24
VLD, ICD	2008-03-07 11:10	Okinawa	TiRuRu	Design of High-rate Irregular LDPC Decoder based on Accelerated Message-passing Schedule Yuta Abe, Naoki Tajima, Xing Li, Kazunori Shimizu, Takeshi Ikenaga, Satoshi Goto (Waseda Univ.) VLD2007-160 ICD2007-183	In this paper, We Design of High Throughput Multi-rate Irregular LDPC Decoder based on Accelerated Message-Passing Sched... [more]	VLD2007-160 ICD2007-183 pp.25-30
VLD, ICD	2008-03-07 11:35	Okinawa	TiRuRu	Low Power Design of Accelerated Message-Passing LDPC Decoder for Long Codes Naoki Tajima, Yuta Abe, Kazunori Shimizu, Takeshi Ikenaga, Satoshi Goto (Waseda Univ.)	LDPC codes that quality is very close to Shannon limit become more important with the developments of radio communicatio... [more]
VLD, ICD	2008-03-07 13:00	Okinawa	TiRuRu	The Improvement of the Ubiqitus Processor HCgorilla Hiroki Takeda, Kazunori Noda, Atuko Yokoyama, Masa-aki Fukase, Tomoaki Sato (Hirosaki Univ) VLD2007-161 ICD2007-184	[more]	VLD2007-161 ICD2007-184 pp.31-36
VLD, ICD	2008-03-07 13:25	Okinawa	TiRuRu	An adaptive error concealment order H.264/AVC Jun Wang, Takeshi Ikenaga, Satoshi Goto (Waseda Univ.) VLD2007-162 ICD2007-185	[more]	VLD2007-162 ICD2007-185 pp.37-40
VLD, ICD	2008-03-07 13:50	Okinawa	TiRuRu	A Low-cost Speed and Yield Enhancement Method Using Embedded Delay Detectors on FPGAs Yohei Kume, Yuuri Sugihara, Ngo Cam Lai, Kazutoshi Kobayashi, Hidetoshi Onodera (Kyoto Univ.) VLD2007-163 ICD2007-186	This paper shows the principle and architecture of a low-cost speed and yield enhancement method using enbedded dela... [more]	VLD2007-163 ICD2007-186 pp.41-46
VLD, ICD	2008-03-07 14:15	Okinawa	TiRuRu	Application-Oriented Dynamic Reconfigurable Network Processor Architecture and Its Optimization Method Motonori Ohta, Shunitsu Kohara, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ) VLD2007-164 ICD2007-187	In this paper, we propose an application directional dynamic reconfigurable network processor architecture and its optim... [more]	VLD2007-164 ICD2007-187 pp.47-52

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