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Technical Committee on Integrated Circuits and Devices (ICD) (Searched in: 2016)
Search Results: Keywords 'from:2016-11-28 to:2016-11-28'
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-29 09:00 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | Measurement of Vth Variation due to STI Stress and Inverse Narrow Channel Effect at Ultra-Low Voltage in a Variability-Suppressed Process Yasuhiro Ogasahara, Hanpei Koike (AIST)  CPM2016-76 ICD2016-37 IE2016-71 |
This paper demonstrates notable impact of Vth shift due to STI-induced dopant redistribution on ultra-low voltage design... [more] | CPM2016-76 ICD2016-37 IE2016-71 pp.1-6 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-29 09:25 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | Optimal configuration design of SCM and MLC/TLC NAND flash memory in semiconductor storage system Chihiro Matsui, Yusuke Yamaga, Yusuke Sugiyama, Ken Takeuchi (Chuo Univ.) CPM2016-77 ICD2016-38 IE2016-72 |
In order to manage wide variety of data at high speed, a tri-hybrid storage system has been proposed with using storage ... [more] | CPM2016-77 ICD2016-38 IE2016-72 pp.7-10 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-29 09:50 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | EMI Performance of Power Delivery Networks in 3D TSV Integration Yuuki Araga (AIST), Makoto Nagata, Noriyuki Miura, Hiroaki Ikeda (Kobe Univ.), Katsuya Kikuchi (AIST) CPM2016-78 ICD2016-39 IE2016-73 |
[more] | CPM2016-78 ICD2016-39 IE2016-73 pp.11-16 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-29 10:30 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | Accurate Lithography Simulation Model based on Deep Learning Yuki Watanabe, Tetsuaki Matsunawa, Taiki Kimura, Shigeki Nojima (Toshiba) VLD2016-56 DC2016-50 |
Lithography simulation is an indispensable technology for today's semiconductor manufacturing processes. To achieve accu... [more] | VLD2016-56 DC2016-50 pp.73-78 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-29 10:55 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | Length Difference Minimization with Exchanging Pin Pair for Set Pair Routing Problem Shutaro Hara, Kunihiro Fujiyoshi (TUAT) VLD2016-57 DC2016-51 |
Set pair routing is the problem to minimize the maximum difference of paths(length difference) that one to one connected... [more] | VLD2016-57 DC2016-51 pp.79-84 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-29 11:20 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | SADP-Cut Aware Two-color Grid Routing Hatsuhiko Miura, Mitsuru Hasegawa, Kunihiro Fujiyoshi (TUAT) VLD2016-58 DC2016-52 |
Self-Aligned Double Patterning (SADP) is one of the promising manufacturing option to overcome the limit of miniaturizat... [more] | VLD2016-58 DC2016-52 pp.85-90 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-29 10:30 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | [Invited Talk]
Development of Three-Dimensional Integrated CMOS Image Sensors with Pixel-Parallel Signal Processors by Using Direct Bonding of SOI Layers Masahide Goto, Yuki Honda, Toshihisa Watabe, Kei Hagiwara, Masakazu Nanba, Yoshinori Iguchi (NHK), Takuya Saraya, Masaharu Kobayashi, Eiji Higurasgi, Hiroshi Toshiyoshi, Toshiro Hiramoto (Univ. Tokyo) CPM2016-79 ICD2016-40 IE2016-74 |
[more] | CPM2016-79 ICD2016-40 IE2016-74 pp.17-21 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-29 10:55 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | [Invited Talk]
IoT時代におけるエッジデバイスのインテリジェント化を支える脳型デバイスの重要性 Yasumitsu Orii (NAGASE & CO., LTD.) |
[more] | |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-29 13:00 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | [Invited Talk]
FPGA Development using HLS for Software Engineers Kenichiro Mitsuda, Hiroshi Owada, Shinji Yamamoto (ISP) RECONF2016-48 |
[more] | RECONF2016-48 p.47 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-29 13:15 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | [Invited Talk]
Ultra-large-scale ultra-high-speed image display technology and applications
-- Application of Image big data -- Hidemichi Kawase (Kamiens) CPM2016-80 ICD2016-41 IE2016-75 |
[more] | CPM2016-80 ICD2016-41 IE2016-75 p.23 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-29 14:40 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | [Keynote Address]
CMOS Annealing Machine to Solve Combinatorial Optimization Problems for IoT Era Masanao Yamaoka (Hitachi) VLD2016-59 CPM2016-81 ICD2016-42 IE2016-76 CPSY2016-52 DC2016-53 RECONF2016-49 |
A new computing machine, CMOS annealing machine, using Ising model that effectively solves combinatorial optimization pr... [more] | VLD2016-59 CPM2016-81 ICD2016-42 IE2016-76 CPSY2016-52 DC2016-53 RECONF2016-49 pp.91-96(VLD), pp.25-30(CPM), pp.25-30(ICD), pp.25-30(IE), pp.27-32(CPSY), pp.91-96(DC), pp.49-54(RECONF) |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-29 15:45 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | [Keynote Address]
The development of video coding technology and contribution to HD transition Akira Nakagawa (Fujitsu Labs.) VLD2016-60 CPM2016-82 ICD2016-43 IE2016-77 CPSY2016-53 DC2016-54 RECONF2016-50 |
[more] | VLD2016-60 CPM2016-82 ICD2016-43 IE2016-77 CPSY2016-53 DC2016-54 RECONF2016-50 p.97(VLD), p.31(CPM), p.31(ICD), p.31(IE), p.33(CPSY), p.97(DC), p.55(RECONF) |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-29 16:45 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | [Keynote Address]
Data mining techniques and applications
-- Graph mining and exploratory data analysis -- Makoto Onizuka (Osaka Univ.) |
[more] | |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-30 09:00 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | Fast Test Pattern Reordering Based on Weighted Fault Coverage Shingo Inuyama, Kazuhiko Iwasaki (Tokyo Metropolitan Univ.), Masayuki Arai (Nihon Univ.) VLD2016-61 DC2016-55 |
Shrinking feature size and higher integration on semiconductor device manufacturing technology bring a problem of the ga... [more] | VLD2016-61 DC2016-55 pp.99-104 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-30 09:25 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | Design of TDC Embedded in Scan FFs for Testing Small Delay Faults Shingo Kawatsuka, Hiroyuki Yotsuyanagi, Masaki Hashizume (Tokushima Univ.) VLD2016-62 DC2016-56 |
With improvement of semiconductor manufacturing process, small delay becomes more important cause of timing failures. ... [more] |
VLD2016-62 DC2016-56 pp.105-110 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-30 09:50 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | On SAT based test pattern generation for transition faults considering signal activities Yusuke Matsunaga (Kyushu Univ.) VLD2016-63 DC2016-57 |
This paper presents a test pattern generation method with considering signal transition activities using a SAT solver... [more] |
VLD2016-63 DC2016-57 pp.111-115 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-30 10:15 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | A Method of LRSR Seed Generation for On-chip Fault Diagnosis Hayato Minamizono, Satoshi Ohtake (Oita Univ.) VLD2016-64 DC2016-58 |
[more] | VLD2016-64 DC2016-58 pp.117-122 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-30 09:00 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | Development and evaluation of on-chip body bias tuning scheme Hayate Okuhara, Akram Ben Ahmed, Hideharu Amano (Keio Univ.) CPSY2016-54 |
[more] | CPSY2016-54 pp.35-40 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-30 09:25 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | CPSY2016-55 |
[more] | CPSY2016-55 pp.41-46 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-30 10:15 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | A Case for GPU Synchronization Method for Graph Processing Using Remote GPUs Shin Morishima, Hiroki Matsutani (Keio Univ.) CPSY2016-56 |
(To be available after the conference date) [more] | CPSY2016-56 pp.53-58 |
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