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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] |
2023-11-17 09:35 |
Kumamoto |
Civic Auditorium Sears Home Yume Hall (Primary: On-site, Secondary: Online) |
A comparator with variable offset voltage variation by controlling differential pair’s currents Taira Sakaguchi, Satoshi Komatsu (Tokyo Denki Univ.) VLD2023-67 ICD2023-75 DC2023-74 RECONF2023-70 |
We propose a comparator with variable offset voltage variation.The proposed comparator is based on a conventional Strong... [more] |
VLD2023-67 ICD2023-75 DC2023-74 RECONF2023-70 pp.192-197 |
SCE |
2023-08-08 13:25 |
Kanagawa |
Yokohama National Univ. (Primary: On-site, Secondary: Online) |
Design of a superconducting stochastic memory for large-scale stochastic-computing system Wenhui Luo (Yokohama Nat’l Univ.), Naoki Takeuchi (AIST), Olivia Chen (Tokyo City Univ.), Nobuyuki Yoshikawa (Yokohama Nat’l Univ.) SCE2023-7 |
Stochastic computing-based neural networks (SC-NNs) have been developed for energy-efficient neuromorphic computing. In ... [more] |
SCE2023-7 pp.34-38 |
DC |
2023-02-28 15:50 |
Tokyo |
Kikai-Shinko-Kaikan Bldg (Primary: On-site, Secondary: Online) |
Stochastic flash ADC with variable input voltage range Taira Sakaguchi, Satoshi Komatsu (Tokyo Denki Univ.) DC2022-90 |
In this study, a stochastic flash ADC with variable input voltage range is proposed. A stochastic flash ADC uses random ... [more] |
DC2022-90 pp.45-50 |
ICD, CPSY, CAS |
2017-12-14 10:40 |
Okinawa |
Art Hotel Ishigakijima |
Performance Analysis of Level-Cross Detection Method based on Stochastic Comparator Taiki Sugiyama, Tetsuya Iizuka (Univ. of Tokyo), Takahiro Yamaguchi (Advantest), Toru Nakura, Kunihiro Asada (Univ. of Tokyo) CAS2017-66 ICD2017-54 CPSY2017-63 |
ADC based on level-cross detection quantizes time rather than voltage. When the clock frequency is doubled, SNR of ADC i... [more] |
CAS2017-66 ICD2017-54 CPSY2017-63 pp.15-20 |
VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-30 14:10 |
Osaka |
Ritsumeikan University, Osaka Ibaraki Campus |
A study on verification method of stochastic flash A/D converter with FPGA Shodai Isami, Toshimasa Matsuoka (Osaka Univ) CPM2016-88 ICD2016-49 IE2016-83 |
In a stochastic flash analog-to-digital converter utilizing a mismatch in device characteristics, system verification me... [more] |
CPM2016-88 ICD2016-49 IE2016-83 pp.63-67 |
ICD, CPSY |
2015-12-18 15:55 |
Kyoto |
Kyoto Institute of Technology |
Performance Analysis of Analog to Digital Converter Based on Stochastic Comparator Md. Maruf Hossain, Tetsuya Iizuka, Toru Nakura, Kunihiro Asada (Tokyo University) ICD2015-93 CPSY2015-106 |
A performance model for Analog to Digital Converter (ADC) based on stochastic comparator has been proposed by analyzing ... [more] |
ICD2015-93 CPSY2015-106 pp.123-128 |
ICD, CPSY |
2014-12-01 15:15 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Poster Presentation]
Application of Stochastic A/D Conversion to SAR-ADC Yusaku Hirai, Tomohiro Asano, Sadahiro Tani, Toshifumi Kurata, Keiji Tatsumi (Osaka Univ.), Takatsugu Kamata (SPChange), Toshimasa Matsuoka (Osaka Univ.) ICD2014-95 CPSY2014-107 |
In this study, a digitally controlled variable threshold comparator is studied using stochastic A/D conversion that util... [more] |
ICD2014-95 CPSY2014-107 pp.73-78 |
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