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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| VLD, HWS, ICD | 2024-03-01 14:00 |
Okinawa | (Primary: On-site, Secondary: Online) |
High-Level Synthesis Method for Python Considering Runtime Profiling Yusuke Suzuki, Makoto Ikeda (UTokyo)  VLD2023-127 HWS2023-87 ICD2023-116 |
With the increasing complexity of LSI design in recent years, high-level synthesis (HLS) technology has attracted attent... [more] | VLD2023-127 HWS2023-87 ICD2023-116 pp.145-150 |
| RECONF | 2017-09-26 13:55 |
Tokyo | DWANGO Co., Ltd. | A case study of High-level Synthesis Using Higher-order Function on Functional Language Takuya Teraoka, Morihiro Kuga, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2017-35 |
The growing capabilities of silicon technology and the increasing complexity of applications in recent decades have forc... [more] | RECONF2017-35 pp.75-80 |
| RECONF, CPSY, VLD, IPSJ-SLDM [detail] | 2015-01-30 10:50 |
Kanagawa | Hiyoshi Campus, Keio University | A Hardware Trojan Detection Method based on Trojan net features Masaru Oya, Youhua Shi, Masao Yanagisawa, Nozomu Togawa (Waseda Univ.) VLD2014-137 CPSY2014-146 RECONF2014-70 |
Recently, digital ICs are designed by outside vendors to reduce costs in semiconductor industry. This circumstance intr... [more] |
VLD2014-137 CPSY2014-146 RECONF2014-70 pp.157-162 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2014-11-26 17:30 |
Oita | B-ConPlaza | A Hardware Trojans Detection Method focusing on Nets in Hardware Trojans in Gate-Level Netlists Masaru Oya, Youhua Shi, Masao Yanagisawa, Nozomu Togawa (Waseda Univ.) VLD2014-91 DC2014-45 |
Recently, digital ICs are designed by outside vendors to reduce design costs in semiconductor industry. This circumstan... [more] |
VLD2014-91 DC2014-45 pp.135-140 |
| NC, MBE (Joint) |
2014-03-17 15:40 |
Tokyo | Tamagawa University | Temporal relationship between object category representation and the level of category abstraction in the human visual cortex Masashi Sato, Yoichi Miyawaki (UEC) NC2013-128 |
Object categories can be hierarchically ordered from abstract to concrete levels. Previous studies showed that the corre... [more] | NC2013-128 pp.227-232 |
| PRMU, IPSJ-CVIM, MVE [detail] | 2014-01-23 17:30 |
Osaka | Improvement og a Distance between Concepts using a Weighted Combination of Image Instances with Their Text Tags Nozomi Masuhiro, Kazuaki Nakamura, Noboru Babaguchi (Osaka Univ.) PRMU2013-103 MVE2013-44 |
In recent years, methods for calculating semantic distance between various concepts from a set of tagged images have bee... [more] | PRMU2013-103 MVE2013-44 pp.131-136 |
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| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2013-11-28 08:55 |
Kagoshima | System-level design method considering the interrupt processing Yuki Ando, Yukihito Ishida, Shinya Honda, Hiroaki Takada, Masato Edahiro (Nagoya Univ.) VLD2013-77 DC2013-43 |
We propose a system level design methodology for control systems that have both input and output by abstraction of inter... [more] | VLD2013-77 DC2013-43 pp.119-124 |
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| VLD | 2013-03-05 10:50 |
Okinawa | Okinawa Seinen Kaikan | High Level Resynthesis Approach of Reusable RTL Property Msaato Tatsuoka, Mineo Kaneko (JAIST) VLD2012-145 |
Similar to RTL language that has been used as a design entry for LSI, a high-level description language such as SystemC,... [more] | VLD2012-145 pp.55-60 |
| VLD | 2012-03-06 15:05 |
Oita | B-con Plaza | High-Level Synthesis for Mixed Behavioral-Level/RTL Design Descriptions Hiroaki Yoshida, Masahiro Fujita (Univ. of Tokyo) VLD2011-128 |
It is widely known that high-level synthesis technology can improve the design productivity dramatically by raising the ... [more] | VLD2011-128 pp.49-54 |
| VLD | 2012-03-06 15:30 |
Oita | B-con Plaza | CDFG Transformation Based on Speculation Exploiting Implicit Parallelism in Behavioral Synthesis Shinji Ohno (Nagoya Univ.), Kazuyoshi Takagi, Naofumi Takagi (Kyoto Univ.) VLD2011-129 |
In recent years, circuit design in languages with higher abstraction level has been widely noticed to address the proble... [more] | VLD2011-129 pp.55-60 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-11-29 14:10 |
Fukuoka | Kyushu University | A Scalable Heuristic for Incremental High-Level Synthesis Shohei Ono (Univ. Tokyo), Hiroaki Yoshida, Masahiro Fujita (Univ. of Tokyo/JST) VLD2010-59 DC2010-26 |
Recently, high-level synthesis techniques have been widely used to achieve high design productivity by enabling a desig... [more] |
VLD2010-59 DC2010-26 pp.13-18 |
| ICD, VLD | 2007-03-08 09:50 |
Okinawa | Mielparque Okinawa | An efficient design methodology for image processing digital system by using a high level hardware description language Satoru Inoue, Taiki Hashizume, Tomonori Izumi, Masahiro Fukui (Ritsumeikan Univ.) |
Higher abstraction design has been highly required so that a human can focus on intelligent part of design by making com... [more] | VLD2006-123 ICD2006-214 pp.25-30 |
| ICD, VLD | 2007-03-09 14:20 |
Okinawa | Mielparque Okinawa | A behavioral power modeling algorithm which considers area speed tradeoff Noriyuki Inoue, Masaaki Ohtsuki, Masahiro Fukui (Ritsumeikan Uni.) |
Due to the rapid growth of the size of systems, it has become a very important task to plan the design strategy based on... [more] | VLD2006-151 ICD2006-242 pp.63-68 |
| SIP, ICD, IE, IPSJ-SLDM | 2005-10-21 14:20 |
Miyagi | Ichinobo, Sakunami-Spa | A study for hardware optimization using a high level synthesis fron C Satoru Inoue, Tsuyoshi Kondo, Tomonori Izumi, Masahiro Fukui (Rits) |
Higher abstraction design has been highly required so that a human can focus on inspired part of design by making comput... [more] | SIP2005-124 ICD2005-143 IE2005-88 pp.55-60 |
| SIP, ICD, IE, IPSJ-SLDM | 2005-10-21 15:00 |
Miyagi | Ichinobo, Sakunami-Spa | A study for power and speed tradeoff estimation for behavior hardware model Noriyuki Inoue, Katsuhiro Oshikawa, Tomonori Izumi, Masahiro Fukui (Rits Univ.) |
Due to the increasing of the scale of systems, planning the design strategy based on the power estimation in early desig... [more] | SIP2005-126 ICD2005-145 IE2005-90 pp.67-72 |
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