IEICE Technical Committee Submission System
Conference Schedule
Online Proceedings
[Sign in]
Tech. Rep. Archives
    [Japanese] / [English] 
( Committee/Place/Topics  ) --Press->
 
( Paper Keywords:  /  Column:Title Auth. Affi. Abst. Keyword ) --Press->

All Technical Committee Conferences  (Searched in: All Years)

Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 21 - 40 of 48 [Previous]  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
NLP, CAS 2012-09-20
12:40
Kochi Eikokuji Campus, University of Kochi Desgin of a boot-strapped switch circuit to achieve continuous ON-state
Naoaki Saimen, Masayoshi Tachibana (Kochi Univ of Tech) CAS2012-30 NLP2012-56
This paper present that the desgin of a boot-strapped switch circuit to achieve continuous ON-state,
the simulated of ... [more]
CAS2012-30 NLP2012-56
pp.1-5
CAS, CS, SIP 2012-03-09
13:05
Niigata The University of Niigata A construction of a floating-type scaling capacitor
Tatsuya Fujii, Fujihiko Matsumoto, Takeshi Ohbuchi, Tomomi Abe (NDA) CAS2011-141 SIP2011-161 CS2011-133
Impedance scaling technique is known as a method to reduce area of large capacitances for low frequency integrated filte... [more] CAS2011-141 SIP2011-161 CS2011-133
pp.189-194
CAS 2012-01-20
09:25
Fukuoka Kyushu Univ. Phase Reduction Analysis on Noise-induced Synchronization among Nonlinear Oscillator Circuits
Kazuki Nakada (Kyusu Univ.), Keiji Miura (Tohoku Univ.), Tetsuya Asai (Hokkaido Univ.) CAS2011-101
We propose a design approach for optimization of noise-induced synchronization among analog sub-RF CMOS oscillator circu... [more] CAS2011-101
pp.89-94
EST 2011-10-06
14:35
Nagasaki Nagasaki Prefectural Art Museum A Study of Electromagnetic Modeling of GSG Probes for On-Wafer Measurement
Takuichi Hirano, Kenichi Okada, Jiro Hirokawa, Makoto Ando (Tokyo Tech) EST2011-67
On-chip analog RF circuits are measured using GSG probes by contacting them onto pads. Electromagnetic simulation modeli... [more] EST2011-67
pp.15-20
OPE, MW, MWP, EMT, EST, IEE-EMT [detail] 2011-07-21
17:35
Hokkaido   A Study of EM Simulation Modeling for Excitations using GSG Pads with Symmetric Circuit in On-Wafer Measurement
Takuichi Hirano, Kenichi Okada, Jiro Hirokawa, Makoto Ando (Tokyo Tech) MW2011-52 OPE2011-39 EST2011-38 MWP2011-20
On-chip analog RF circuits are measured using GSG probes by contacting them onto pads. Electromagnetic simulation modeli... [more] MW2011-52 OPE2011-39 EST2011-38 MWP2011-20
pp.85-90
NLP 2011-06-30
14:50
Hokkaido Shari-cho Kohminkan: Yme-hall Shiretoko Noise-Induced Phase Synchronization among Current-Noise-Sensitive Analog CMOS Oscillators
Masakazu Matsuura, Akira Utagawa, Tetsuya Asai, Masato Motomura (Hokkaido Univ.) NLP2011-29
This report aims at the development of on-chip distributed clock sources on synchronous digital VLSIs. We focused attent... [more] NLP2011-29
pp.23-28
CS, SIP, CAS 2011-03-03
11:30
Okinawa Ohhamanobumoto memorial hall (Ishigaki)( A Design of Analog FFT Processor with CMOS Switched Capacitors
Hiromu Takano, Yohtaro Umeda, Osamu Takyu (Tokyo Univ. of Science) CAS2010-130 SIP2010-146 CS2010-100
Cognitive radio is considered as the highly promising solution to the shortage problem of the frequency resources. In th... [more] CAS2010-130 SIP2010-146 CS2010-100
pp.167-172
CAS 2011-01-25
15:15
Kumamoto Kumamoto University Low-Voltage Current Mirror with Transimpedance Amplifier
Akio Shimizu, Sumio Fukai (Saga Univ.), Yohei Ishikawa (ANCC) CAS2010-90
We propose a novel current mirror with a transimpedance amplifier that has high accuracy and high output swing.
A feedb... [more]
CAS2010-90
pp.35-38
ICD 2009-12-14
13:30
Shizuoka Shizuoka University (Hamamatsu) [Poster Presentation] A nanowatt DA converter for subthreshold CMOS LSIs
Kazuki Yamamoto, Ken Ueno, Tetsuya Asai, Yoshihito Amemiya (Hokkaido Univ.) ICD2009-88
An ultra-low power digital-to-analog (DA) converter based on the technique of pulse-width-modulated DA conversion was pr... [more] ICD2009-88
pp.59-64
ICD 2009-12-15
10:00
Shizuoka Shizuoka University (Hamamatsu) [Invited Talk] A New VLSI System Architecture Mimicking the Processing in the Mind
Tadashi Shibata (Univ. of Tokyo.) ICD2009-95
The performance of a today’s computer is really marvelous. It can carry out a prodigious amount of numerical calculation... [more] ICD2009-95
pp.101-109
ICD 2009-12-15
10:50
Shizuoka Shizuoka University (Hamamatsu) [Invited Talk] History and Technology Trends of Si RF Analog LSI Developments -- Emergence of New-Type Circuit Designers --
Tsuneo Tsukahara (Univ. of Aizu) ICD2009-96
The history of silicon RF analog circuits is described, focusing on the development of CMOS RF circuits. Moreover, the e... [more] ICD2009-96
pp.111-116
NLP 2009-11-13
15:55
Kagoshima   A CMOS Frequency Comparator based on Jamming Avoidance Response of Eigenmannia -- A CMOS decoder circuit extracting frequency difference from amplitudes and phases of EODs --
Daichi Fujita, Tetsuya Asai, Yoshihito Amemiya (Hokkaido Univ.) NLP2009-111
In this paper, we implement a model of an electric fish, \textit{Eigenmannia}, that detects frequency differences betwee... [more] NLP2009-111
pp.165-170
ICD, ITE-IST 2009-10-01
13:55
Tokyo CIC Tokyo (Tamachi) CMOS Analog Integrated Circuits for On-Chip Biosensing
Kazuo Nakazato (Nagoya Univ.) ICD2009-42
New high-density and low-power CMOS analog integrated circuits, CMOS source-drain follower and CMOS source-measure unit,... [more] ICD2009-42
pp.45-50
ICD, ITE-IST 2009-10-02
13:55
Tokyo CIC Tokyo (Tamachi) [Invited Talk] Technical Trend of RF circuits
Satoshi Tanaka (Renesas Tech Corp.) ICD2009-54
This paper describes resent technology trend of mixed analog digital RF circuits. With progress of CMOS technology, larg... [more] ICD2009-54
pp.117-122
SR 2009-07-30
16:20
Tokyo Tokyo institute of technology [Invited Talk] RF CMOS Integrated Circuit -- Reconfigurability and Scalability --
Kazuya Masu, Noboru Ishihara, Shuhei Amakawa (Tokyo Tech) SR2009-48
We discuss the issues of present and future RF CMOS integrated circuit, which is the most significant hardware component... [more] SR2009-48
pp.165-166
EMD 2009-03-06
15:50
Tokyo Kougakuin Univ. Simulation study of analog input buffer characteristics in CMOS integrated circuits
Yuuto Horiki, Keiko Fukuda (Tokyo Metropolitan Coll. of Ind Tech.) EMD2008-144
Complementary-type analog input buffer is proposed for low-voltage operation in CMOS integrated circuits. It consists o... [more] EMD2008-144
pp.41-44
CAS, NLP 2009-01-22
09:00
Miyazaki   Design of Differential Amplifier in Consideration of 1/f Noise
Fusa Hirano, Koichi Tanno (Miyazaki Univ.), Hisashi Tanaka (Miyakonojo Nat'l Coll of Tech), Hiroki Tamura (Miyazaki Univ.) CAS2008-63 NLP2008-93
$1/f$ noise is serious problem in sensor interface circuits because the output signal of general sensors is very small a... [more] CAS2008-63 NLP2008-93
pp.1-6
NC 2008-11-08
13:00
Saga Saga Univ. [Invited Talk] Brain-inspired Integrated Systems with Time-domain Information Processing
Takashi Morie, Hideki Tanaka, Daisuke Atuti, Keisuke Korekado, Kazuki Nakada (Kyushu Inst. of Tech.) NC2008-68
We have proposed merged analog-digital circuit architecture, which can perform multiply-and-accumulation and arbitrary n... [more] NC2008-68
pp.55-60
NC, MBE
(Joint)
2008-03-12
14:10
Tokyo Tamagawa Univ Coarse image region segmentation using a region-based coupled MRF model and its CMOS circuit implementation
Yusuke Kawashima, Daisuke Atuti, Kazuki Nakada (Kyutech), Masato Okada (Univ. of Tokyo), Takashi Morie (Kyutech) NC2007-120
Coupled Markov random field (MRF) models for coarse image region segmentation are classified into boundary and region ba... [more] NC2007-120
pp.49-54
NC 2007-11-18
15:15
Saga Saga Univ. Evaluation of a CMOS Spiking Neural Network LSI with STDP Function
Hideki Tanaka, Takashi Morie (Kyutech), Kazuyuki Aihara (Tokyo Univ.) NC2007-61
In some spiking neuron models, analog information is expressed by the
timing of neuronal spike firing events, and synap... [more]
NC2007-61
pp.37-42
 Results 21 - 40 of 48 [Previous]  /  [Next]  
Choose a download format for default settings. [NEW !!]
Text format pLaTeX format CSV format BibTeX format
Copyright and reproduction : All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan