Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
DC |
2018-02-20 15:05 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
A method for improving an estimation accuracy of a specific temperature and voltage range in a digital temperature and voltage sensor Kenji Inoue, Yousuke Miyake, Seiji Kajihara (Kyutech) DC2017-85 |
An RO(Ring Oscillator)-based digital temperature and voltage sensor has been proposed in order to measure an on-chip tem... [more] |
DC2017-85 pp.49-54 |
ICD, CPSY, CAS |
2017-12-14 09:50 |
Okinawa |
Art Hotel Ishigakijima |
Design of Quick-Lock Reference-Clock-Less All-Digital CDR using Delay Tunable Buffer for Lock Range Extension Meikan Chin, Tetsuya Iizuka, Toru Nakura, Kunihiro Asada (Univ. of Tokyo) CAS2017-64 ICD2017-52 CPSY2017-61 |
A quick-lock reference-clock-less all-digital burst-mode CDR is proposed. Since the proposed CDR resumes from a standby ... [more] |
CAS2017-64 ICD2017-52 CPSY2017-61 pp.3-8 |
CPSY, DC, IPSJ-ARC (Joint) [detail] |
2017-07-26 16:15 |
Akita |
Akita Atorion-Building (Akita) |
A Two-Temperature-Point Calibration Method for A Digital Temperature And Voltage Sensor Yousuke Miyake, Yasuo Sato, Seiji kajihara (KIT) DC2017-19 |
A measurement method of a digital sensor using ring oscillators to measure a temperature and a voltage of a VLSI was pro... [more] |
DC2017-19 pp.19-24 |
DC |
2015-12-18 13:20 |
Niigata |
Kurieito Mulakami (Murakami City) |
On Measurement of On-Chip Temperature And Voltage Variation Using A Digital Monitor Yousuke Miyake, Takaaki Kato, Takuya Itonaga, Yasuo Sato, Seiji Kajihara (KIT) DC2015-74 |
A digital monitor for measuring a temperature and a voltage of VLSIs is proposed. The monitor can derive measurement res... [more] |
DC2015-74 pp.5-10 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-02 14:10 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
A Design of a Quick-Lock All-Digital CDR with Improved Jitter Performance by Fractional Phase Selection Technique Norihito Tohge, Tetsuya Iizuka, Toru Nakura (Univ. of Tokyo), Satoshi Miura, Yoshimichi Murakami (THine), Kunihiro Asada (Univ. of Tokyo) CPM2015-130 ICD2015-55 |
A quick-lock all-digital Clock-Data Recovery circuit that does not require a reference clock is propposed. Internal
Tim... [more] |
CPM2015-130 ICD2015-55 pp.17-22 |
ICD |
2014-01-28 15:00 |
Kyoto |
Kyoto Univ. Tokeidai Kinenkan |
[Poster Presentation]
An ultra-low-voltage power-supply monitor circuit for wireless-powered microparticle manipulation system Ji Cui, Hirosuke Iwasaki, Yoshiaki Dei, Toshimasa Matsuoka (Osaka Univ.) ICD2013-105 |
This paper presents a voltage sensor (VS) circuit to monitor the supply voltage induced on wireless-pow-ered micropartic... [more] |
ICD2013-105 pp.15-18 |
ICD, ITE-IST |
2013-07-04 09:55 |
Hokkaido |
San Refre Hakodate |
A Low Power Fast Lock All-Digital CDR with TDC Combined DLL Yuki Urano, Won-Joo Yun, Kaoru Kohira, Teruo Jyo, Tadahiro Kuroda, Hiroki Ishikuro (Keio Univ.) ICD2013-25 |
This paper presents an all-digital CDR with TDC combined DLL which can be used for not only NRZ signaling but also pulse... [more] |
ICD2013-25 pp.7-12 |
ICD, ITE-IST |
2011-07-22 09:25 |
Hiroshima |
Hiroshima Institute of Technology |
All-Digital PMOS and NMOS Process Variability Monitor Utilizing Shared Buffer Ring and Ring Oscillator Tetsuya Iizuka, Kunihiro Asada (Univ. of Tokyo) ICD2011-26 |
This paper proposes an all-digital process variability monitor based on a shared structure of a buffer ring and a ring o... [more] |
ICD2011-26 pp.63-68 |