| IEICE Technical Committee Submission System Conference Schedule |
Online Proceedings [Sign in] Tech. Rep. Archives |
All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2011-11-28 13:25 |
Miyazaki | NewWelCity Miyazaki | Performance Evaluation of Soft-Error Tolerant Multiple Modular Processors Implemented with Redundant and Non-Redundant Flip-Flops Shogo Okada, Masaki Masuda (KIT), Jun Yao, Hajime Shimada (NAIST), Kazutoshi Kobayashi (KIT)  VLD2011-59 DC2011-35 |
Soft-error rates are becoming larger due to process scaling. Various ways of prediction for soft-error are being tried.... [more] |
VLD2011-59 DC2011-35 pp.43-48 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2011-11-30 10:05 |
Miyazaki | NewWelCity Miyazaki | A DMR based Parmanent Error Locating Method for a Dependable FU Array Yohei Hazama, Jun Yao, Takashi Nakada, Yasuhiko Nakashima (NAIST) CPSY2011-51 |
Triple Modular Redundancy (TMR) is widely used to locating the erroneous unit inside electronic device when the possibil... [more] | CPSY2011-51 pp.47-52 |
| DC, CPSY (Joint) |
2011-07-28 15:15 |
Kagoshima | Proposal for High Efficient DVS Using Adaptive Redundancy of FUs Yukihiro Sasagawa, Jun Yao, Takashi Nakada, Yasuhiko Nakashima (NAIST) DC2011-15 |
Recently, the well-known low power technology DVS(Dynamic Voltage Scaling) is aggressively applied to processors with Ra... [more] | DC2011-15 pp.1-6 |
|
| RECONF | 2011-05-12 13:30 |
Hokkaido | Hokkaido Univ. (Faculty of Eng., B3 Bldg.) | Context Synchronization Method for Reliable Softcore Processor System Makoto Fujino, Noritaka Kai, Yoshihiro Ichinomiya, Motoki Amagasaki, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2011-5 |
SRAM-based FPGAs are vulnerable to a SEU, which is induced by radiation effect. The SEU's effects on configuration mem... [more] |
RECONF2011-5 pp.25-30 |
| CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-UBI, IPSJ-MBL [detail] | 2010-03-28 13:20 |
Tokyo | A Case Study of Duplication Technique for SRAM-based FPGA Kyohei Shiraishi, Motoki Amagasaki, Morihiro Kuga (Kumamoto Univ.), Nobuhisa Fujiyama, Michihiko Inukai (Toshiba), Toshinori Sueyoshi (Kumamoto Univ.) CPSY2009-90 DC2009-87 |
SRAM-based Field Programmable Gate Array (FPGA) is widely used in various applications such as industrial electronic dev... [more] | CPSY2009-90 DC2009-87 pp.471-476 |
|
| IPSJ-SLDM, VLD, CPSY, RECONF [detail] | 2010-01-27 14:30 |
Kanagawa | Keio Univ (Hiyoshi Campus) | Fault Recovery Technique for Softcore Processor using Partial Reconfiguration Yoshihiro Ichinomiya, Shiro Tanoue, Motoki Amagasaki, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) VLD2009-94 CPSY2009-76 RECONF2009-79 |
This paper presents a technique for ensuring reliable softcore processor implemented on SRAM-based Field Programmable Ga... [more] | VLD2009-94 CPSY2009-76 RECONF2009-79 pp.155-160 |
| IA, ICSS | 2009-06-19 10:10 |
Tokyo | Kikai-Shinko-Kaikan Bldg | Design and Verification of Dual Redundant Communication Protocols using Model Checking Satoshi Ikeda, Masahiro Jibiki (NEC Corp.), Yasushi Kuno, Taketoshi Nishimori (Univ. of Tsukuba.) IA2009-13 ICSS2009-21 |
Fail-over clusters are utilized as a means to assure high-availability for services which require high reliability. If w... [more] | IA2009-13 ICSS2009-21 pp.67-72 |
| RECONF | 2009-05-15 09:30 |
Fukui | Recovery and syncronization technique for TMR softcore processor Yoshihiro Ichinomiya, Shiro Tanoue, Toshio Yabuta, Motoki Amagasaki, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2009-9 |
This paper presents a technique for ensuring reliable softcore processor implemented on SRAM-based Field Programmable Ga... [more] | RECONF2009-9 pp.49-54 |
|
| VLD | 2009-03-11 14:50 |
Okinawa | Fault Tolerant Datapath Synthesis Starting with Triple Algorithm Redundancy Yutaka Tsuboishi, Mineo Kaneko (JAIST) VLD2008-132 |
In this paper, we investigate the problem to synthesize a fault-tolerant datapath from a triplicated computation algorit... [more] | VLD2008-132 pp.35-40 |
|
| IA, SITE | 2009-03-05 15:00 |
Kumamoto | Configuration of Redundant Network in Okayama University via Regional IXes and SINET Nariyoshi Yamai, Kiyohiko Okayama, Yong Jin, Keita Kawano, Yoshihiro Oosumi (Okayama Univ.) SITE2008-63 IA2008-86 |
Okayama University has been using an external link and many inter-campus links via Science Information Network (SINET) a... [more] | SITE2008-63 IA2008-86 pp.113-118 |
|
| RECONF | 2008-09-26 12:50 |
Okayama | Okayama Univ. | A Case Study of Reliable Softcore Processor Using TMR Technique Yoshihiro Ichinomiya, Shiro Tanoue, Tomoyuki Ishida, Motoki Amagasaki, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2008-35 |
SRAM-based FPGA has lower reliability than dedicated integrated circuit because of radiation effect. We focus on TMR (Tr... [more] | RECONF2008-35 pp.75-80 |
| IN | 2008-07-18 14:35 |
Hyogo | Koube Univ. | An Evaluation of Hybrid node of Mobile IPv6 Takahisa Yamada, Takashi Kobayashi (Kandai) IN2008-39 |
It accompanies the spread of the internet, and a lot of service use internet. Not only the computer but also a lot of t... [more] |
IN2008-39 pp.77-82 |
| R | 2008-06-20 14:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Industrial Unified Controller nv series
-- Improvement of reliability -- Naruhiko Aramaki, Hiroyuki Kusakabe (Toshiba) R2008-18 |
Toshiba has developed the Unified Controller nv series, new industrial control equipment which are the core components o... [more] | R2008-18 pp.21-24 |
| OCS, PN, CS (Joint) |
2007-06-15 11:35 |
Hokkaido | Chitose Inst. of Science and Technology | Equipment Protection for High Availability of Control and Data Planes in Photonic Cross-Connect Kiyoshi Onohara, Yuji Akiyama, Hiroyuki Sato, Eiichi Horiuchi, Takashi Mizuochi, Toshiyuki Ichikawa, Sota Yoshida, Yoshimasa Baba, Kazuo Kubo, Keiji Okubo (Mitsubishi Electric Corp.) OCS2007-19 |
In order to help meet the network needs arising from the continuous growth of Internet traffic, photonic cross-connects ... [more] | OCS2007-19 pp.53-58 |
| RECONF | 2006-05-19 13:00 |
Miyagi | TOHOKU UNIVERSITY | [Special Invited Talk]
Wafer Scale Integration and Reconfigurable Systems Susumu Horiguchi (Tohoku Univ) |
It has been continued to implement much more circuits on a chip and high functional system in a silicon wafer since the ... [more] | RECONF2006-15 pp.25-30 |
[Return to Top Page]