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Committee Date Time Place Paper Title / Authors Abstract Paper #
IPSJ-SLDM, CPSY, RECONF, VLD [detail] 2014-01-29
16:45		 Kanagawa Hiyoshi Campus, Keio University Binary Synthesis of Hardware Accelerator Tightly Coupled with CPU
Shimpei Tamura, Nagisa Ishiura (Kwansei Gakuin Univ.), Hiroyuki Kanbara (ASTEM), Hiroyuki Tomiyama (Ritsumeikan Univ.) VLD2013-133 CPSY2013-104 RECONF2013-87		 This article presents a method of synthesizing hardware that accelerates specified sections of binary programs. The acce... [more] VLD2013-133 CPSY2013-104 RECONF2013-87
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