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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
VLD |
2010-09-28 10:00 |
Kyoto |
Kyoto Institute of Technology |
A Method of Analog IC Placement with Common Centroid Constraints Keitaro Ue, Kunihiro Fujiyoshi (TUAT) VLD2010-48 |
Monolithic IC has a characteristic that absolute error of device parameter is large but relative variability is small.
... [more] |
VLD2010-48 pp.37-42 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-17 14:30 |
Fukuoka |
Kitakyushu Science and Research Park |
On Handling Cell Placement with Exclusive Adjacent Symmetry Constraints for Analog IC Layout Design Shimpei Asano, Kunihiro Fujiyoshi (Tokyo University of Agriculture and Technology) VLD2008-71 DC2008-39 |
(To be available after the conference date) [more] |
VLD2008-71 DC2008-39 pp.67-72 |
CS, SIP, CAS |
2008-03-07 09:50 |
Yamaguchi |
Yamaguchi University |
Improved Method of Multi-Branched Bus Driven Floorplanning Yosuke Taira, Kunihiro Fujiyoshi (TUAT) CAS2007-132 SIP2007-207 CS2007-97 |
sequence-pair, バスドリブン, フロアプラン設計, 増加部分列, 減少部分列
sequence-pair, Bus-driven, floorplanning, increasing subsequence, decre... [more] |
CAS2007-132 SIP2007-207 CS2007-97 pp.41-46 |
VLD, CPSY, RECONF, DC, IPSJ-SLDM, IPSJ-ARC (Joint) [detail] |
2007-11-22 13:00 |
Fukuoka |
Kitakyushu International Conference Center |
Necessary and Sufficient Conditions for Symmetry Placements Kunihiro Fujiyoshi, Chikaaki Kodama, Shinichi Koda (TUAT) |
(To be available after the conference date) [more] |
VLD2007-95 DC2007-50 pp.37-41 |
VLD, CPSY, RECONF, DC, IPSJ-SLDM, IPSJ-ARC (Joint) [detail] |
2007-11-22 13:25 |
Fukuoka |
Kitakyushu International Conference Center |
Improved Method of Rectilinear Block Packing Based on O-Tree Representation Hidehiko Ukibe, Kunihiro Fujiyoshi (TUAT) VLD2007-96 DC2007-51 |
In this paper, we propose an improved method to represent
rectilinear block packing based on an expanded O-Tree.
Here... [more] |
VLD2007-96 DC2007-51 pp.43-48 |
RECONF, CPSY, VLD, DC, IPSJ-SLDM, IPSJ-ARC (Joint) [detail] |
2006-11-30 11:20 |
Fukuoka |
Kitakyushu International Conference Center |
On Handling Cell Placement with Adjacent Symmetry Constraints for Analog IC Layout Design Shinichi Kouda, Kunihiro Fujiyoshi (TUAT) |
In recent high performance analog IC design,
it is often required to place some cells
symmetrically to a horizontal ... [more] |
VLD2006-77 DC2006-64 pp.31-36 |
VLD, ICD, DC, IPSJ-SLDM |
2005-12-01 17:05 |
Fukuoka |
Kitakyushu International Conference Center |
Floorplan Design for 3D-VLSI Hidenori Ohta (Tokyo Univ. of Agri. & Tech.), Toshinori Yamada (Saitama Univ.), Chikaaki Kodama, Kunihiro Fujiyoshi (Tokyo Univ. of Agri. & Tech.) |
[more] |
VLD2005-75 ICD2005-170 DC2005-52 pp.85-90 |
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